Journal ArticleDOI

# Statistical Compact Model Extraction: A Neural Network Approach

01 Dec 2012--Vol. 31, Iss: 12, pp 1920-1924

TL;DR: ANNs can model a much higher degree of nonlinearity compared to existing quadratic polynomial models and, hence, can even be used in sub-100-nm technologies to model leakage current that exponentially depends on process parameters.

AbstractA technique for extracting statistical compact model parameters using artificial neural networks (ANNs) is proposed. ANNs can model a much higher degree of nonlinearity compared to existing quadratic polynomial models and, hence, can even be used in sub-100-nm technologies to model leakage current that exponentially depends on process parameters. Existing techniques cannot be extended to handle such exponential functions. Additionally, ANNs can handle multiple input multiple output relations very effectively. The concept applied to CMOS devices improves the efficiency and accuracy of model extraction. Results from the ANN match the ones obtained from SPICE simulators within 1%.

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Journal ArticleDOI

TL;DR: An accurate and efficient machine learning (ML) approach which predicts variations in key electrical parameters using process variations (PVs) from ultrascaled gate-all-around (GAA) vertical FET (VFET) devices with the same degree of accuracy, as well as improved efficiency compared to a 3-D stochastic TCAD simulation.
Abstract: In this brief, we present an accurate and efficient machine learning (ML) approach which predicts variations in key electrical parameters using process variations (PVs) from ultrascaled gate-all-around (GAA) vertical FET (VFET) devices. The 3-D stochastic TCAD simulation is the most powerful tool for analyzing PVs, but for ultrascaled devices, the computation cost is too high because this method requires simultaneous analysis of various factors. The proposed ML approach is a new method which predicts the effects of the variability sources of ultrascaled devices. It also shows the same degree of accuracy, as well as improved efficiency compared to a 3-D stochastic TCAD simulation. An artificial neural network (ANN)-based ML algorithm can make multi-input -multi-output (MIMO) predictions very effectively and uses an internal algorithm structure that is improved relative to existing techniques to capture the effects of PVs accurately. This algorithm incurs approximately 16% of the computation cost by predicting the effects of process variability sources with less than 1% error compared to a 3-D stochastic TCAD simulation.

8 citations

### Cites methods from "Statistical Compact Model Extractio..."

• ...This calculation process is repeated approximately 20 000 times or more, and the calculation runs in a form similar to the Taylor series to return an accurate final value [15], [16]....

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Journal ArticleDOI

3 citations

Journal ArticleDOI
TL;DR: This letter shows an important role in filling the gap between the emerging device proposal and the development of the SPICE model and the results are compared with a general linear model (GLM).
Abstract: This letter presents a novel method for the sensitivity analysis between a process parameter and an electrical characteristic using the gradient of a neural network (NN). As devices become scaled and new emerging devices appear, it becomes more complex and the development of a SPICE model takes considerable time. Sensitivity analysis based on NN can accurately obtain the sensitivity even if the data are correlated with each other and have a non-linear relationship. The proposed method can be used to model the device characteristics and optimize process control through component analysis. It is verified using a feedback field-effect transistor (FBFET), one of the emerging neuromorphic devices. We execute experiments with 1055 TCAD simulations calibrated based on 33 measurement data for various process parameters and bias combinations and compare the results with a general linear model (GLM). In this work, we select 7 input parameters and extract voltage threshold ( ${V} _{\text {th}}$ ) and on-current ( ${I} _{\text {ON}}$ ), which are key characteristics of FBFET, as output parameters, and analyze the sensitivity with our method and provide a process control solution. This letter shows an important role in filling the gap between the emerging device proposal and the development of the SPICE model.

3 citations

### Cites methods from "Statistical Compact Model Extractio..."

• ...the correlation between process parameters increases, and the relationship between the process parameters and the electrical parameters may be non-linear, making it harder to analyze these devices with the conventional methods [8]–[11]....

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Proceedings ArticleDOI
, Kyul Ko1
06 Apr 2020
TL;DR: This work investigated process variation effect of 3D NAND flash memory cell, especially about geometric variation using a machine learning (ML) model, which has multi-input and multi-output (MIMO) structure and deep hidden layers to train and predict complex data of process variation.
Abstract: We investigated process variation effect of 3D NAND flash memory cell, especially about geometric variation using a machine learning (ML) model. Geometric variability sources impact on variation of device's electrical parameters such as threshold voltage $(\mathbf{V}_{\mathbf{t}})$ , subthreshold swing (SS), transconductance $(\mathbf{g}_{\mathbf{m}})$ and on-current $(\mathbf{I}_{\mathbf{on}})$ . All these data were analyzed with 3D stochastic Technology Computer-Aided Design (TCAD) simulation and trained through ML model, which is composed of artificial neural network (ANN). The model has multi-input and multi-output (MIMO) structure and deep hidden layers to train and predict complex data of process variation. In order to make ML model more accurate, simulation for constructing training data set was carried out with a large number of random unit cells, which are cut from various strings. The completed ML model was tested with random test data set which had not been used for training to prove its accuracy. Through the test process, ML model showed the error of up to 5% and proved the accuracy of prediction.

1 citations

Journal ArticleDOI
TL;DR: A technique to extract statistical model parameters for skewed Gaussian process variations is proposed and results show that the extracted parameters, when simulated, match the performance parameter targets to within 3% for both Gaussian and skewed process variations.
Abstract: A technique to extract statistical model parameters for skewed Gaussian process variations is proposed. Statistical compact model extraction traditionally assumes that underlying process variations are Gaussian in nature. ON currents in certain high voltage technologies, which are linear in process deviations, show skew in their distribution and hence is indicative of skew in the underlying process variations. The use of skew-normal random variables is proposed to model such variations. Artificial neural networks (ANNs) are used to empirically model the functional relation of performance on process deviations and a framework to propagate skew-normal random variables through ANNs is proposed. A non-linear optimisation problem is formulated to extract the parameters that characterise the skew-normal process variations, with constraints imposed on the objective function to penalise any deviation from Gaussian variations. Results show that the extracted parameters, when simulated, match the performance parameter targets to within 3% for both Gaussian and skewed process variations.

1 citations

##### References
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Journal ArticleDOI
Kurt Hornik
TL;DR: It is rigorously established that standard multilayer feedforward networks with as few as one hidden layer using arbitrary squashing functions are capable of approximating any Borel measurable function from one finite dimensional space to another to any desired degree of accuracy, provided sufficiently many hidden units are available.
Abstract: This paper rigorously establishes that standard multilayer feedforward networks with as few as one hidden layer using arbitrary squashing functions are capable of approximating any Borel measurable function from one finite dimensional space to another to any desired degree of accuracy, provided sufficiently many hidden units are available. In this sense, multilayer feedforward networks are a class of universal approximators.

15,834 citations

Book ChapterDOI
TL;DR: The chapter discusses two important directions of research to improve learning algorithms: the dynamic node generation, which is used by the cascade correlation algorithm; and designing learning algorithms where the choice of parameters is not an issue.
Abstract: Publisher Summary This chapter provides an account of different neural network architectures for pattern recognition. A neural network consists of several simple processing elements called neurons. Each neuron is connected to some other neurons and possibly to the input nodes. Neural networks provide a simple computing paradigm to perform complex recognition tasks in real time. The chapter categorizes neural networks into three types: single-layer networks, multilayer feedforward networks, and feedback networks. It discusses the gradient descent and the relaxation method as the two underlying mathematical themes for deriving learning algorithms. A lot of research activity is centered on learning algorithms because of their fundamental importance in neural networks. The chapter discusses two important directions of research to improve learning algorithms: the dynamic node generation, which is used by the cascade correlation algorithm; and designing learning algorithms where the choice of parameters is not an issue. It closes with the discussion of performance and implementation issues.

12,585 citations

Proceedings ArticleDOI
13 Jun 2005
TL;DR: The proposed method for analyzing the leakage current, and hence the leakage power, of a circuit under process parameter variations that can include spatial correlations due to intra-chip variation is presented.
Abstract: In this paper, we present a method for analyzing the leakage current, and hence the leakage power, of a circuit under process parameter variations that can include spatial correlations due to intra-chip variation. A lognormal distribution is used to approximate the leakage current of each gate and the total chip leakage is determined by summing up the lognormals. In this work, both subthreshold leakage and gate tunneling leakage are considered. The proposed method is shown to be effective in predicting the CDF/PDF of the total chip leakage. The average errors for mean and sigma values are -1.3% and -4.1%.

242 citations

Journal ArticleDOI
K. Takeuchi
TL;DR: In this article, a statistical compact model parameter extraction method is proposed and described in detail, where the target of fitting is not the individual transistor, but statistically analyzed results (more specifically, principal components) of measured data.
Abstract: In this paper, a new method of statistical compact model parameter extraction is proposed and described in detail. The method is characterized in that the target of fitting is not the individual transistor, but statistically analyzed results (more specifically, principal components) of measured data. Variations of transistor characteristics can be translated into equivalent variations of compact model parameters by only one fitting step without repeating the parameter extraction procedure multiple times. Since the fitting is based on the response of a compact model to parameters, detailed information of the model is not necessary. The method has been applied to modeling the variations of metal-oxide-semiconductor field-effect transistor current versus voltage characteristics, and its validity has been confirmed.

34 citations

Journal ArticleDOI
TL;DR: A new chip-level statistical method to estimate the total leakage current in the presence of within-die and die-to-die variability is presented and an integrated approach to accurately estimate the yield loss when both frequency and power limits are imposed on a design is presented.
Abstract: In addition to traditional constraints on frequency, leakage current has emerged as a stringent constraint in modern processor designs. Since leakage current exhibits a strong inverse correlation with circuit delay, effective parametric yield prediction must consider the dependence of leakage current on frequency. In this paper, a new chip-level statistical method to estimate the total leakage current in the presence of within-die and die-to-die variability is presented. A closed-form equation for total chip leakage that models the dependence of the leakage current distribution on different process parameters is developed. The proposed analytical expression is obtained directly from pertinent design information and includes both subthreshold and gate leakage currents. Using this model, an integrated approach to accurately estimate the yield loss when both frequency and power limits are imposed on a design is then presented. The proposed method demonstrates the importance of considering both these limiting factors while calculating the yield of a lot

32 citations