L
Liyang Song
Researcher at IBM
Publications - 9
Citations - 173
Liyang Song is an academic researcher from IBM. The author has contributed to research in topics: Metal gate & High-κ dielectric. The author has an hindex of 3, co-authored 9 publications receiving 150 citations.
Papers
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Proceedings ArticleDOI
High performance 14nm SOI FinFET CMOS technology with 0.0174µm 2 embedded DRAM and 15 levels of Cu metallization
C-H. Lin,Brian J. Greene,Shreesh Narasimha,J. Cai,A. Bryant,Carl J. Radens,Vijay Narayanan,Barry Linder,Herbert L. Ho,A. Aiyar,E. Alptekin,J-J. An,Michael V. Aquilino,Ruqiang Bao,V. Basker,Nicolas Breil,MaryJane Brodsky,William Y. Chang,Clevenger Leigh Anne H,Dureseti Chidambarrao,Cathryn Christiansen,D. Conklin,C. DeWan,H. Dong,L. Economikos,Bernard A. Engel,Sunfei Fang,D. Ferrer,A. Friedman,Allen H. Gabor,Fernando Guarin,Ximeng Guan,M. Hasanuzzaman,J. Hong,D. Hoyos,Basanth Jagannathan,S. Jain,S.-J. Jeng,J. Johnson,B. Kannan,Y. Ke,Babar A. Khan,Byeong Y. Kim,Siyuranga O. Koswatta,Amit Kumar,T. Kwon,Unoh Kwon,L. Lanzerotti,H-K Lee,W-H. Lee,A. Levesque,Wai-kin Li,Zhengwen Li,Wei Liu,S. Mahajan,Kevin McStay,Hasan M. Nayfeh,W. Nicoll,G. Northrop,A. Ogino,Chengwen Pei,S. Polvino,Ravikumar Ramachandran,Z. Ren,Robert R. Robison,Saraf Iqbal Rashid,Viraj Y. Sardesai,S. Saudari,Dominic J. Schepis,Christopher D. Sheraw,Shariq Siddiqui,Liyang Song,Kenneth J. Stein,C. Tran,Henry K. Utomo,Reinaldo A. Vega,Geng Wang,Han Wang,W. Wang,X. Wang,D. Wehelle-Gamage,E. Woodard,Yongan Xu,Y. Yang,N. Zhan,Kai Zhao,C. Zhu,K. Boyd,E. Engbrecht,K. Henson,E. Kaste,Siddarth A. Krishnan,Edward P. Maciejewski,Huiling Shang,Noah Zamdmer,R. Divakaruni,J. Rice,Scott R. Stiffler,Paul D. Agnello +98 more
TL;DR: In this article, the authors present a fully integrated 14nm CMOS technology featuring fin-FET architecture on an SOI substrate for a diverse set of SoC applications including HP server microprocessors and LP ASICs.
Patent
Threshold Voltage Adjustment For Thin Body Mosfets
Mary Jane Brodsky,Ming Cai,Dechao Guo,William K. Henson,Shreesh Narasimha,Yue Liang,Liyang Song,Yanfeng Wang,Chun-Chen Yeh +8 more
TL;DR: In this article, a planar transistor with a carbon-implanted well is described, where the concentration of the Carbon within the well is selected to establish a desired voltage threshold of the transistor.
Proceedings ArticleDOI
New layout dependency in high-k/Metal Gate MOSFETs
Masafumi Hamaguchi,Deleep R. Nair,Jaeger Daniel,H. Nishimura,Wai-kin Li,M-H. Na,Christophe Bernicot,J. Liang,Knut Stahrenberg,K. Kim,Manfred Eller,K-C. Lee,T. Iwamoto,Y-W. Teh,S. Mori,Y. Takasu,J.H. Park,Liyang Song,N-S. Kim,S. Kohler,H. Kothari,J.-P. Han,S. Miyake,H. V. Meer,Franck Arnaud,Kathy Barla,Melanie J. Sherony,Ricardo A. Donaton,M. Celik,Katsura Miyashita,Vijay Narayanan,Richard A. Wachnik,Michael P. Chudzik,J. Sudijono,JiYeon Ku,Jongpal Kim,M. Sekine,S. Johnson,W. Neumueller,Ron Sampson,E. Kaste,R. Divakaruni,Fumiyoshi Matsuoka +42 more
TL;DR: In this article, a gate patterning boundary proximity layout dependent effect in high-k dielectric/metal gate (HK/MG) MOSFETs is reported, which causes anomalous threshold voltage (V t ) modulation for the first time.
Patent
Transistors with uniaxial stress channels
TL;DR: In this article, a method for fabricating a transistor with uniaxial stress channels was proposed, which consists of depositing an insulating layer onto a substrate, defining bars within the insulating layers, recessing a channel into the substrate, growing a first semiconducting material in the channel, defining a gate stack over the bars and semiconductor material, defining source and drain recesses, and embedding a second semiconductoring material into the source/drone recesses.
Patent
Reduction of contact resistance and junction leakage
TL;DR: In this article, a time clock and a printer platen are fixed relative to a base, and the time card rests thereon, and a ribbon shield is fixed near the base.