Showing papers in "Microelectronics Reliability in 2003"

TL;DR: An overview of MEMS failure mechanisms that are commonly encountered is provided, focusing on the reliability issues of micro-scale devices, but, for some issues, the field of their macroscopic counterparts is also briefly touched.

TL;DR: The effects of the fourth elements, i.e., Fe, Ni, Co, Mn and Ti, on microstructural features, undercooling characteristics, and monotonic tensile properties of Sn–3 wt.%Ag–0.%Cu lead-free solder were investigated and Ni alloy is more reliable solder alloy with improved properties for all tests in the present work.

TL;DR: The results indicate that voids reduce the life of the solder joint and this effect may depend not only on the size, but also on frequency and location.

TL;DR: Electrical and optical degradations of GaN/InGaN single-quantum-well light-emitting diodes (LEDs) under high-injection current and reverse-bias stresses were investigated, and the stressed LEDs exhibited minimal degradation of optical characteristics.

TL;DR: A new type of DBC material with a 60% increase in flexural strength and more than 100% increase of temperature cycles is developed, which means the thermal resistance of multichip power modules can be reduced substantially without decreasing reliability.

TL;DR: A historical review on the development of low-frequency noise study in electron devices and the recent progresses in the understanding and modeling are updated is presented.

TL;DR: In this article, a Silicon Controlled Rectifier (SCR) for power line and local I/O ESD protection is presented, which exhibits a dual ESD clamp characteristic: low-current high-voltage clamping and high-current low-voltages clamping.

TL;DR: In this paper, it is reviewed how to integrate the ferroelectric devices for producing commercial products.

TL;DR: The results of tests on a number of commercial Smartpack ® modules provide useful information about the influence of materials properties and geometry on the step response, and could be used for package quality control and reliability investigations.

TL;DR: The present status of the SiC power MOSFETs technology that is approaching commercialization is reviewed and emphasis is placed upon the impact of SiO2–SiC interface quality on the performance of SiC MOSfETs.

TL;DR: A new insight into the causes and physics of non-Fickian adsorption in polymeric packaging materials is presented along with a technique to alleviate the associated characterisation challenge.

TL;DR: Both global and local parametric 3D FEA fatigue models are established for TFBGA on board with considerations of detailed pad design, realistic shape of solder joint, and nonlinear material properties, and they have the capability to predict the fatigue life of solder Joint during the thermal cycling test within ±13% error.

TL;DR: The study of 20-μm-pitch interconnection technology of three-dimensional (3D) packaging focused on reliability, ultrasonic flip–chip bonding and Cu bump bonding is described, and it is succeeded in building a stacked chip sample with 20- μm- pitch interconnections.

TL;DR: In this paper, the fracture strength of a silicon die is measured via the three-point bend test conducted using a micro-force tester, and it is observed that die strength strongly depends on the grinding patterns, i.e. minimum die strength in a wafer is found if the grinding mark is in parallel with the loading axis.

TL;DR: The relentless progress of semiconductor integration is reducing the area required for circuits, and the area available for power and ground bumps on wafer-level chip-scale packages also shrinks and the bump current density is now approaching levels where electromigration is a significant reliability concern.

TL;DR: Investigation of the dissolution kinetics of Sn3.5Ag0.5Cu lead-free solder alloy on electrolytic Ni/electroless NiP layer finds that after acquiring certain thickness P-rich Ni layer breaks and increases the diffusion rate of Sn and as a consequence both the IMCs growth rate and dissolution rate also increases.

TL;DR: To meet the needs of future microelectronics and microsystems, there needs a paradigm shift in the approach to system reliability, and this paper discusses several reasons for these facts and offers a perspective for future improvements.

TL;DR: A methodical procedure is described that allows reliability issues to be approached efficiently and the implementation of the methodology is illustrated with real-life examples of reliability aspects of hot film mass air flow sensors, inertial sensors as well as piezoelectric actuators.

TL;DR: A two step mechanism involving the generation of a conduction path followed by a destructive thermal effect is proposed to explain breakdown mechanism of MIM capacitors using HfO2 and Al2O3–HfO 2 stacked layers.

TL;DR: It is concluded that the thermally induced deformations predicted by the non-linear FEM models match well with measured deformations for both the naked die and the real packages.

TL;DR: Higher thermal stress in the Z-direction is accumulated in the ACF interconnections with Au bump during the reflow process owing to the higher bump height, thus greater loss of contact area between the particles and I/O pads leads to an increase of contact resistance and poorer reliability after reflow.

TL;DR: The magnitude of hygroswelling stress acting on UBM is found to be greater than the thermal stress induced during reflow, both in tensile mode which may cause the UBM-opening failure and in reflow and PCT.

TL;DR: In this article, the authors present a very compact ESD protection configuration with an ESD area performance up to 5VHBM/um2 in fully silicided and silicide blocked NMOS designs.

TL;DR: A parametric 3D FEA sliced model is established for QFN on board with considerations of detailed pad design, realistic shape of solder joint and solder fillet, and non-linear material properties, and it has the capability to predict the fatigue life of solder Joint during thermal cycling test within ±34% error.

TL;DR: Due to strong requirement in term of capacitance voltage linearity, MIM capacitance stability during the whole operating lifetime of the product appears to be a key issue to warrant the reliability of this device.

TL;DR: Diode failures are a limiting factor for the reliability of power circuits and one failure reason is dynamic avalanche, Dynamic avalanche can be distinguished in three degrees, and some designs are ruined.

TL;DR: The first results of room temperature plasma oxidation to obtain ultrathin layers of SiO 2 and TiO 2 are presented and an oxidation model is proposed to explain this behavior.

TL;DR: An optimized underfill resin is proposed that can achieve low package warpage and a long fatigue life of the solder bump and the future trends in under Fill resin will be to have properties of extremely low elastic modulus and non-linear properties such as creep.

TL;DR: It has been demonstrated that orientation imaging microscopy technique is able to detect early levels of oxidation on the Copper bond pad, which is extremely important in characterization of the bondability of the copper bond pad surface.