Journal ArticleDOI
An MOS transistor model for analog circuit design
TLDR
A physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits is presented.Abstract:
This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model.read more
Citations
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Patent
Apparatus and method for start-up circuit without a start-up resistor
TL;DR: In this article, the NMOS switch is coupled between ground and a common gate node of a PMOS current mirror, and at start-up, it pulls the common gate of the current mirror to ground.
Proceedings ArticleDOI
A very low power area efficient CMOS only bandgap reference
TL;DR: The design of a novel all-MOS low-power bandgap reference in an open loop topology is described, with a forward biased p-n junction with complementary to absolute temperature coefficient combined with a cascade of Self-Cascode MOSFET (SCM) structures providing a proportional toabsolute temperature (PTAT) voltage to create the bandgap voltage reference.
Proceedings ArticleDOI
A CMOS analog four-quadrant multiplier for CNN synapses
TL;DR: A new architecture of analog four-quadrant multiplier in CMOS technology based on the behavior of MOSFET in the linear region from weak to strong inversion is presented, thus being adequate for the implementation of compact synapses in analog Cellular Neural Network (CNN).
Proceedings ArticleDOI
A high-swing MOS cascode bias circuit for operation at any current level
TL;DR: A very simple bias circuit that allows for maximum output voltage swing of MOSFET cascode stages is proposed and experimental results validate the strategy for designing the bias network.
Proceedings Article
Common gate LNA design space exploration in all inversion regions
TL;DR: Comparisons between the MATLAB design space exploration and BSIM3v3 simulations using Spectre-RF are done, through the design example of a 900 MHz CG-LNA implemented in a 0.35 mum CMOS technology.
References
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Book
Operation and modeling of the MOS transistor
TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Journal ArticleDOI
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Journal ArticleDOI
A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
TL;DR: In this paper, a new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used.
Journal ArticleDOI
A charge-sheet model of the MOSFET
TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.