Journal ArticleDOI
An MOS transistor model for analog circuit design
TLDR
A physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits is presented.Abstract:
This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model.read more
Citations
More filters
Proceedings ArticleDOI
A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback
TL;DR: This paper presents the design of a two-stage pseudo-differential operational transconductance amplifier (OTA), which operates at a supply voltage of 0.5 V and consumes only 28 muW of power.
Proceedings ArticleDOI
Improvements in biasing and compensation of CMOS opamps
S. Nicolson,K. Phang +1 more
TL;DR: Modifications to the constant-gm bias circuit and the Miller-lead compensation technique are presented which eliminate or minimize some of their shortcomings and a new circuit topology is suggested that requires 75% less compensation capacitance to achieve stability.
Book ChapterDOI
CMOS Analog Design Using All-Region MOSFET Modeling: Advanced MOS transistor modeling
Journal ArticleDOI
Floating-gate analog implementation of the additive soft-input soft-output decoding algorithm
TL;DR: The soft-input soft-output algorithm is used to iteratively decode concatenated codes, and an additive form in the logarithmic domain is employed to efficiently implement this algorithm.
The Foundations of the EKV MOS Transistor Charge-Based Model
TL;DR: This research presents a probabilistic procedure for estimating the EKV-NQS response time step-by-step in the aftermath of an electrical shock to the nervous system.
References
More filters
Book
Operation and modeling of the MOS transistor
TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Journal ArticleDOI
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Journal ArticleDOI
A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
TL;DR: In this paper, a new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used.
Journal ArticleDOI
A charge-sheet model of the MOSFET
TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.