Journal ArticleDOI
An MOS transistor model for analog circuit design
TLDR
A physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits is presented.Abstract:
This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model.read more
Citations
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Journal ArticleDOI
Design techniques for low-voltage analog integrated circuits
TL;DR: In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed, and the most suitable design methods for lowvoltage analog IC design in a standard CMOS process are shown.
Journal ArticleDOI
Direct determination of threshold condition in DG-MOSFETs from the gm/ID curve
Ana Isabela Araújo Cunha,Marcelo Antonio Pavanello,Renan Trevisoli,Carlos Galup-Montoro,Márcio Cherem Schneider +4 more
TL;DR: In this article, the authors apply the current-based threshold voltage definition (equality between the drift and diffusion components of drain current) to intrinsic symmetric double-gate MOSFETs.
Journal ArticleDOI
Integrated power management circuit for piezoelectronic generator in wireless monitoring system of orthopaedic implants
TL;DR: A hybrid direct current (DC)-DC, comprising a switched capacitor (SC) DC-DC converter and a low dropout (LDO) linear voltage regulator, is presented to improve conversion efficiency and stacked switches technique is proposed to reduce leakage current in switching process of SC converter.
Proceedings ArticleDOI
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
Alessandro Girardi,Sergio Bampi +1 more
TL;DR: A transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimization guide, providing solutions close to optimum with a single technology-dependent curve and accurate expressions for transconductance and current valid in all operation regions.
Proceedings ArticleDOI
A fully integrated 0.5-7 Hz CMOS bandpass amplifier
TL;DR: The design methodology of a fully integrated g/sub m/-C, 0.5-7 Hz band-pass amplifier designed to be employed in signal conditioning of a piezoelectric accelerometer, which is part of an implantable biomedical device is presented.
References
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Book
Operation and modeling of the MOS transistor
TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Journal ArticleDOI
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Journal ArticleDOI
A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
TL;DR: In this paper, a new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used.
Journal ArticleDOI
A charge-sheet model of the MOSFET
TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.