Journal ArticleDOI
An MOS transistor model for analog circuit design
TLDR
A physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits is presented.Abstract:
This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model.read more
Citations
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Proceedings ArticleDOI
MOS-only M-2M DAC for ultra-low voltage applications
TL;DR: Simulation results in a commercial 130 nm process corroborate the presented analysis, showing that it is possible to implement this DAC topology for 6 to 8 bits operating under supply voltages from 70 mV to 140 mV.
Analysis of non-idealities in parallel-summation logarithmic amplifiers
TL;DR: In this article, the authors discuss non-ideal factors in the used components, which play a key role in the performance of high-accuracy logarithmic amplifiers for sensing applications, and show that simplified mathematical models may lead to wrong conclusions.
Proceedings ArticleDOI
CMOS analog four-quadrant multiplier free of voltage reference generators
Antonio Jose Sobrinho de Sousa,Fabian Souza de Andrade,Hildeloi Cunha dos Santos,Gabriele Costa Goncalves,Maicon Deivid Pereira,Edson Pinto Santana,Ana Isabela Araujo Cunha +6 more
TL;DR: This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks and includes a signal application method that avoids voltage or current reference generators.
Proceedings ArticleDOI
CMOS OTA sizing using ACM model in a graphical approach
TL;DR: A graphical approach for the application of a compact current based MOS model, valid in all regimes of operation, in the design of CMOS operational transconductance amplifiers, allows a rapid and reliable determination of transistor dimensions that satisfy design specifications and saturation conditions.
Journal ArticleDOI
Addition to "An analysis of flicker noise rejection in low-power and low-voltage CMOS mixers"
TL;DR: An inconsistency has been pointed out between equations in the title paper of as discussed by the authors, and the inconsistency is briefly discussed in Section 2.1, Section 3.2.1].
References
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Book
Operation and modeling of the MOS transistor
TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Journal ArticleDOI
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Journal ArticleDOI
A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
TL;DR: In this paper, a new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used.
Journal ArticleDOI
A charge-sheet model of the MOSFET
TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.