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Journal ArticleDOI

An MOS transistor model for analog circuit design

TLDR
A physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits is presented.
Abstract
This paper presents a physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits. Static and dynamic characteristics of the MOS field-effect transistor are accurately described by single-piece functions of two saturation currents in all regions of operation. Simple expressions for the transconductance-to-current ratio, the drain-to-source saturation voltage, and the cutoff frequency in terms of the inversion level are given. The design of a common-source amplifier illustrates the application of the proposed model.

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Journal ArticleDOI

Resistorless BJT bias and curvature compensation circuit at 3.4 nW for CMOS bandgap voltage references

TL;DR: In this paper, a resistorless bipolar junction transistor (BJT) bias and curvature compensation circuit for ultra-low-power CMOS bandgap voltage references (BGRs) is introduced.
Journal ArticleDOI

A CMOS threshold voltage reference source for very-low-voltage applications

TL;DR: A CMOS voltage reference is described that makes use of weak inversion CMOS transistors and linear resistors, without the need for bipolar transistors, but the reference voltage is based on the threshold voltage of an nMOS transistor.
Proceedings ArticleDOI

Automated design of operational transconductance amplifiers using reversed geometric programming

TL;DR: A method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-convex constraints, to improve the accuracy of convex equation-based optimization, without compromising global optimality.
Proceedings ArticleDOI

Calculation of MOSFET distortion using the transconductance-to-current ratio (g m /I D )

TL;DR: Analytical expressions for MOSFET distortion as a function of inversion level, represented by gm/ID as a proxy are presented, which are particularly useful for moderate inversion, where the generic textbook equations fail.

Design and Realisation of Integrated Circuits for the Readout of Pixel Sensors in High Energy Physics and Biomedical Imaging

Ivan Peric
Abstract: Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. Post address: Nussallee 12 53115 Bonn Germany BONN-IR-2004-13 Bonn University August 2004 ISSN-0172-8733 UNIVERSIT . . AT BONN Physikal isches Institut Design and Realisation of Integrated Circuits for the Readout of Pixel Sensors in High-Energy Physics and Biomedical Imaging
References
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Book

Operation and modeling of the MOS transistor

TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Journal ArticleDOI

An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications

TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Journal ArticleDOI

A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

TL;DR: In this paper, a new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used.
Journal ArticleDOI

A charge-sheet model of the MOSFET

TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.
Proceedings Article

Micropower Techniques

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