Journal ArticleDOI
Analytical Modeling of Output Conductance in Long-Channel Halo-Doped MOSFETs
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TLDR
In this paper, a detailed physical analysis and an analytical derivation of the degradation of the output resistance observed in relatively long-channel laterally nonuniformly doped devices with halo implants are presented.Abstract:
In this paper, a detailed physical analysis and an analytical derivation of the degradation of the output resistance (Rout) observed in relatively long-channel laterally nonuniformly doped devices with halo implants are presented. Two-dimensional device simulations were performed, and the simulations show that the channel can be split into two uniformly doped transistors in series for the purpose of analysis. The lower doped bulk transistor is on the source side, while the higher doped halo transistor is toward the drain end. Based on this two-transistor analysis, a simple Rout degradation model is derived for implementation in a MOSFET compact modelread more
Citations
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Journal ArticleDOI
2-D Analytical Modeling of Threshold Voltage for Graded-Channel Dual-Material Double-Gate MOSFETs
TL;DR: In this article, a 2D analytical model for the surface potential and threshold voltage of graded-channel dual-material double-gate (GCDMDG) MOSFETs obtained by intermixing the concepts of graded doping in channel and dual material in gate engineering has been proposed.
Journal ArticleDOI
A Sub- $\mu{\rm W}$ Bandgap Reference Circuit With an Inherent Curvature-Compensation Property
TL;DR: A new current-mode bandgap reference circuit (BGR) which is capable of generating sub-1-V output voltage is presented, which has not only the lowest theoretical minimum current consumption among published current- mode BGRs, but also additional advantages of an inherent curvature-compensation function and not requiring NPN BJTs.
Journal ArticleDOI
The Potential of FinFETs for Analog and RF Circuit Applications
P. Wambacq,Bob Verbruggen,K. Scheir,Jonathan Borremans,Morin Dehan,Dimitri Linten,V. De Heyn,G. Van der Plas,Abdelkarim Mercha,Bertrand Parvais,C. Gustin,V. Subramanian,Nadine Collaert,Malgorzata Jurczak,Stefaan Decoutere +14 more
TL;DR: It is demonstrated with functional prototypes of analog and RF circuits that the combination of a new gate stack with a FinFET transistor architecture outperforms comparable circuit realizations in planar bulk CMOS for low to moderate speed.
Book ChapterDOI
Surface-Potential-Based Compact Model of Bulk MOSFET
Gennady Gildenblat,W. Wu,Xin Li,Ronald van Langevelde,A.J. Scholten,G.D.J. Smit,Dirk B. M. Klaassen +6 more
TL;DR: In this paper, the authors review surface potential-based approach to compact modeling of bulk MOS transistors and provide introduction to the widely used PSP model jointly developed by the Arizona State University and NXP Semiconductors.
Journal ArticleDOI
Anomalous Transconductance in Long Channel Halo Implanted MOSFETs: Analysis and Modeling
TL;DR: An analytical model, based on the equivalent conductance of the halo device, is developed to understand the anomalous behavior of transconductance in halo implanted MOSFET for linear and saturation regions across both gate and body biases.
References
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Book
Analysis and Design of Analog Integrated Circuits
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this article, the authors combine bipolar, CMOS and BiCMOS analog integrated circuits into a unified treatment that stresses their commonalities and highlights their differences, and provide valuable insights into the relative strengths and weaknesses of these important technologies.
Book
Operation and modeling of the MOS transistor
TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Proceedings ArticleDOI
CMOS devices below 0.1 /spl mu/m: how high will performance go?
Yuan Taur,E. J. Nowak +1 more
TL;DR: In this paper, the potential performance gains beyond 0.1 /spl mu/m CMOS are explored and several non-mainstream device alternatives such as SOI, SiGe, and low-temperature CMOS were discussed.
Journal ArticleDOI
PCIM: a physically based continuous short-channel IGFET model for circuit simulation
TL;DR: In this article, the authors present an accurate analytical IGFET model for short-channel devices down to sub-half micron channel lengths, which is described by a single drain current equation, valid for both weak and strong inversion regions of device operation.
Proceedings ArticleDOI
Modeling of pocket implanted MOSFETs for anomalous analog behavior
TL;DR: In this article, the first physical model of drain-induced threshold voltage shift and low output resistance to long channel devices is proposed and verified against data from a 018 /spl mu/m technology.
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