Journal ArticleDOI
C–V characterization of strained Si/SiGe multiple heterojunction capacitors as a tool for heterojunction MOSFET channel design
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TLDR
In this paper, the authors used capacitance-voltage (C-V) characteristics to investigate double heterojunction strained Si/SiGe MOS capacitors, which represented a fast and non-destructive method to determine important characteristics such as layer thicknesses, threshold voltages and band offsets.Abstract:
Capacitance–voltage (C–V) characteristics are used to investigate double heterojunction strained Si/SiGe MOS capacitors. Structures of this type potentially form the channels of CMOS devices based on the strained Si/SiGe material system. The technique represents a fast and non-destructive method to determine important characteristics such as layer thicknesses, threshold voltages and band offsets. Moreover, it contributes to the design of optimum heterostructures for CMOS. Experimental C–V data are compared with simulation and complementary results including SIMS and TEM to confirm the accuracy of the technique.read more
Citations
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Journal ArticleDOI
Impact of strained-Si thickness and Ge out-diffusion on gate oxide quality for strained-Si surface channel n-MOSFETs
Goutam Kumar Dalapati,Sanatan Chattopadhyay,K.S.K. Kwa,Sarah H. Olsen,Y.L. Tsang,R Agaiby,Anthony O'Neill,P. Dobrosz,Steve Bull +8 more
TL;DR: In this article, the performance of a surface channel Si n-MOSFET is significantly influenced by the strained Si/SiO/sub 2/ interface quality, and the effect of the interface trap density was found to be proportional to the Ge content in the virtual substrate.
Journal ArticleDOI
Study of single- and dual-channel designs for high-performance strained-Si-SiGe n-MOSFETs
Sarah H. Olsen,Anthony O'Neill,Sanatan Chattopadhyay,L.S. Driscoll,K.S.K. Kwa,D. J. Norris,A. G. Cullis,Douglas J. Paul +7 more
TL;DR: In this paper, the authors compared the performance of single-and dual-surface channel devices fabricated using 15% Ge content SiGe virtual substrates and found that the compromised performance of the dual-channel devices are attributed to greater interface roughness and increased Ge diffusion resulting from the Si/sub 0.7/Ge/sub 1.3/ buried channel layer.
Journal ArticleDOI
Study of strain relaxation in Si/SiGe metal-oxide-semiconductor field-effect transistors
Sarah H. Olsen,Anthony O'Neill,P Dobrosz,Steve Bull,L.S. Driscoll,Sanatan Chattopadhyay,K.S.K. Kwa +6 more
TL;DR: In this paper, the impact of Si channel strain on MOSFET performance, leakage current, and yield is investigated for Si1−xGex virtual substrates having Ge compositions varying from 0% to 30%.
Journal ArticleDOI
Strained Si MOSFETs on relaxed SiGe platforms: performance and challenges
TL;DR: In this article, the authors review the recent progress in terms of mobility and drive current enhancements achieved in strained-Si n-and p-metal oxide semiconductor field effect transistors (MOSFETs).
Journal ArticleDOI
Design, fabrication and characterisation of strained Si/SiGe MOS transistors
TL;DR: In this article, the authors present a review of the performance of n-channel MOSFETs and the challenges associated with their integration into conventional CMOS processes, and the optimum SiGe alloy composition for virtual substrate based devices is discussed.
References
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Journal ArticleDOI
Theoretical calculations of heterojunction discontinuities in the Si/Ge system.
TL;DR: A theoretical study of the structural and electronic properties of pseudomorphic Si/Ge interfaces, in which the layers are strained such that the lattice spacing parallel to the interface is equal on both sides.
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High-mobility Si and Ge structures
TL;DR: In this article, the structural and electronic properties of lattice-mismatched Si/SiGe heterostructures are discussed in terms of scattering mechanisms and experimental results, and an assessment of the possible role of such heterodevices in future microelectronic circuits is given.
Journal ArticleDOI
Physics and applications of Ge x Si 1-x /Si strained-layer heterostructures
TL;DR: In this paper, the authors review recent advances in our current level of understanding of the physics underlying transport and optical properties of Ge x Si 1-x /Si strained-layer heterostructures.
Journal ArticleDOI
Fabrication and analysis of deep submicron strained-Si n-MOSFET's
TL;DR: In this paper, deep submicron strained-Si n-MOSFETs were fabricated on strained Si/relaxed Si/sub 0.8/Ge/sub sub 0.2/ heterostructures to yield well matched channel doping profiles after processing, allowing comparison of strained and unstrained Si surface channel devices.
Journal ArticleDOI
SiGe-channel heterojunction p-MOSFET's
S. Verdonckt-Vandebroek,Emmanuel F. Crabbe,Bernard S. Meyerson,David L. Harame,Phillip J. Restle,J.M.C. Stork,Jeffrey B. Johnson +6 more
TL;DR: In this paper, the p-channel SiGe MOSFETs with SiGe channels have acceptable short-channel behavior at 0.20 /spl mu/m channel lengths and are preferable to p/sup +/ polysilicon-gate p-MOSFTs for 2.5 V operation.