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Journal ArticleDOI

Efficient Modeling of Power Supply Induced Jitter in Voltage-Mode Drivers (EMPSIJ)

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TLDR
In this paper, an efficient methodology for estimation of power supply induced jitter (PSIJ) in high-speed designs is presented, based on separating the large signal response and the small signal noise response and subsequently combining the results.
Abstract
An efficient methodology for estimation of power supply induced jitter (PSIJ) in high-speed designs is presented. Semianalytical expressions for jitter are derived based on separating the large signal response and the small signal noise response and subsequently combining the results. Proposed simplified relations enable the designers to estimate the PSIJ based on a single bit simulation. Proposed methods are validated on several examples of voltage-mode driver circuits, designed in different technologies and in the presence of different types of noise sources.

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Citations
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Journal ArticleDOI

A Review on Power Supply Induced Jitter

TL;DR: The primary focus of this paper is to discuss the modeling of jitter caused by power supply noise (PSN), named power supply induced jitter (PSIJ).
Journal ArticleDOI

Efficient Jitter Analysis for a Chain of CMOS Inverters

TL;DR: An efficient method to estimate jitter in a chain of CMOS inverters in the presence of multiple noise sources, including the power supply noise, input data noise, and the ground bounce noise is presented.
Journal ArticleDOI

Fast Analysis of Time Interval Error in Current-Mode Drivers

TL;DR: An efficient approach for modeling of time interval error (TIE) due to noise in power delivery networks (PDNs), for current-mode (CM) driver circuits, is presented and a significant speedup is demonstrated using the proposed approach.
Journal ArticleDOI

An Efficient Estimation of Power Supply-Induced Jitter by Numerical Method

TL;DR: This letter presents an efficient and generic methodology for the estimation of power supply-induced jitter by the numerical method using a root-finding approach and reports a significant speed-up reported compared with the simulations by a commercial simulator.
Journal ArticleDOI

Device Parameter-Based Analytical Modeling of Power Supply Induced Jitter in CMOS Inverters

TL;DR: In this article, an analytical approach to determine jitter for a CMOS inverter in the presence of power supply noise (PSN) is presented, where the deviation in the transition edge of the output signal from its ideal timing is modeled accurately for each transition.
References
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Book

The Fourier Transform and Its Applications

TL;DR: In this paper, the authors provide a broad overview of Fourier Transform and its relation with the FFT and the Hartley Transform, as well as the Laplace Transform and the Laplacian Transform.
Book

Jitter, Noise, and Signal Integrity at High-Speed

Mike Li
TL;DR: The fundamental terminology, definitions, and concepts associated with JNB and SI, as well as their sources and root causes are introduced, and Dr. Li provides powerful new tools for solving these problems quickly, efficiently, and reliably.
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