Journal ArticleDOI
Lateral interband tunneling transistor in silicon-on-insulator
C. Aydin,Alexander Zaslavsky,Serge Luryi,Sorin Cristoloveanu,Denis Mariolle,D. Fraboulet,Simon Deleonibus +6 more
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In this paper, a lateral interband tunneling transistor with a heavily doped lateral pn junction in a thin Si film on a silicon-on-insulator (SOI) substrate is presented.Abstract:
We report on a lateral interband tunneling transistor, where the source and drain form a heavily doped lateral pn junction in a thin Si film on a silicon-on-insulator (SOI) substrate. The transistor action results from the control of the reverse-bias tunneling breakdown under drain bias VD by a gate voltage VG. We observe gate control over tunneling drain current ID at both polarities of VG with negligible gate leakage. Systematic ID(VG,VD) measurements, together with numerical device simulations, show that in first approximation ID depends on the maximum junction electric field Fmax(VG,VD). Excellent performance is hence predicted in devices with more abrupt junctions and thinner SOI films. The device does not have an inversion channel and is not subject to scaling rules of standard Si transistors.read more
Citations
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Journal ArticleDOI
Impact of Strain on Drain Current and Threshold Voltage of Nanoscale Double Gate Tunnel Field Effect Transistor: Theoretical Investigation and Analysis
Sneh Saurabh,M. Jagadesh Kumar +1 more
TL;DR: In this paper, a lateral strained double-gate TFET (SDGTFET) is presented, which has a higher on-current, low leakage, low threshold voltage, excellent sub-threshold slope, and good short channel effects.
Book ChapterDOI
Carbon nanotubes and graphene: From structural to device properties
TL;DR: Carbon-based electronics demands a radical shift from present day integrated chip (IC) manufacturing techniques, yet it is touted as a potential alternative for microelectronic applications in the post silicon era as mentioned in this paper .
Proceedings ArticleDOI
Observation of negative differential conductance in nanoscale p-n junctions
TL;DR: In this article, the experimental observation of negative differential conductance (NDC), the basic indication of tunneling, in nanoscale p-n junctions under forward bias condition was reported.
Book ChapterDOI
Silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) circuits for ultralow power (ULP) applications
TL;DR: In this paper, a fully depleted silicon-on-insulator (FDSOI) transistor with back bias control was used for ultralow power applications for long-life battery operation.
References
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Journal ArticleDOI
Frontiers of silicon-on-insulator
TL;DR: In this article, the authors discuss methods of forming silicon-on-insulator (SOI) wafers, their physical properties, and the latest improvements in controlling the structure parameters.
Book
modern semiconductor device physics
TL;DR: Bipolar Transistors (P Asbeck) Compound-Semiconductor Field Effect Transistors(M Shur & T Fjeldly) MOSFETs and Related Devices (S Hillenius) Power Devices (B Baliga) Quantum-Effect and Hot-Electron Devices(S Luryi & A Zaslavsky) Active Microwave Diodes (H Eisele & G Haddad) High-Speed Photonic Devices (T Lee & S Chandrasekhar) Solar Cells (M Green) Appendices Index