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Journal ArticleDOI

Threshold voltage extraction in Tunnel FETs

TLDR
In this article, two possible extrapolation-type methods to extract the threshold voltage of tunnel field effect transistors (TFETs) are proposed, which are based on defining threshold voltage as the gate voltage axis intercept of the linearly extrapolated strong conduction behavior of either CRT or H 1 functions.
Abstract
This article proposes two possible extrapolation-type methods to extract the threshold voltage of Tunnel Field Effect Transistors (TFETs). The first one, which we call the “ CTR method,” makes use of the drain Current-to-Transconductance Ratio function. As this method requires differentiating the drain current with respect to the gate voltage, it is blurred by the amplified effect of measurement noise when applied to real device transfer characteristics. To avoid this effect, a second method is also proposed that uses integration of the drain current with respect to gate voltage instead of differentiation. This second method, which was named “ H 1 method” when it was originally applied to non-crystalline inversion mode MOSFETs, produces comparable results to those obtained from the CTR method, but it has the advantage of inherently reducing the effect of measurement noise by virtue of the low-pass filtering capacity of integration. Both methods are based on defining threshold voltage as the gate voltage axis intercept of the linearly extrapolated strong conduction behavior of either CRT or H 1 functions. This is made possible by approximating the drain current in the strong conduction region of the TFET’s transfer characteristics by a monomial function of the gate voltage. Both methods are illustrated and compared by applying them to measured transfer characteristics of experimental Fin-type TFETs.

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Citations
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Journal ArticleDOI

Effect of scaling on noise in Circular Gate TFET and its application as a digital inverter

TL;DR: The analysis of noise in Circular Gate TFET in presence of interface traps (Gaussian) when the device is subjected to scaling of gate-drain underlap length and body thickness, and change in gate work function and gate dielectric constant shows that generation-recombination noise is dominant at low frequencies whereas diffusion noise is dominates at high frequencies.
Journal ArticleDOI

Analytical Current Transport Modeling of Graphene Nanoribbon Tunnel Field-Effect Transistors for Digital Circuit Design

TL;DR: In this article, a semi-classical and a semiquantum current transport model for p-i-n n-type armchair graphene nanoribbon tunnel field effect transistor (TFET) is studied analytically.
Journal ArticleDOI

Applicability of Transconductance-to-Current Ratio ( $g_{\mathrm {m}}/I_{\mathrm {ds}}$ ) as a Sensing Metric for Tunnel FET Biosensors

TL;DR: In this article, the feasibility of transconductance-to-current ratio ( $g_{\mathrm {{m}}}/I ''I''m''$ ) as a sensing metric for a TFET-based dielectric modulated biosensor was evaluated.
Journal ArticleDOI

Mathematical modeling insight of hetero gate dielectric-dual material gate-GAA-tunnel FET for VLSI/analog applications

TL;DR: In this paper, a mathematical modeling insight for the novel heterogate dielectric-dual material gate-GAA TFET was presented and validated with TCAD simulation, using the appropriate boundary conditions and continuity equations, the Poisson's equation is solved to obtain the potential profile.
Journal ArticleDOI

A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) UTB SOI MOSFETs including substrate induced surface potential effects

TL;DR: In this paper, a threshold voltage model of short-channel recessed-source/drain (Re-S/D) ultra-thin body (UTB) MOSFETs has been presented considering the substrate induced surface potential (SISP) to improve the model accuracy over wide ranges of device parameters and substrate bias.
References
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Book

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TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Journal ArticleDOI

Tunnel field-effect transistors as energy-efficient electronic switches

TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Journal ArticleDOI

Low-Voltage Tunnel Transistors for Beyond CMOS Logic

TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI

New method for the extraction of MOSFET parameters

TL;DR: In this article, a new method for the extraction of the MOSFET parameters is presented, which relies on combining drain current and transconductance transfer characteristics, enabling reliable values of the threshold voltage V/sub t/, the low field mobility mu /sub 0/ and the mobility attenuation coefficient theta to be obtained.
Journal ArticleDOI

Low-subthreshold-swing tunnel transistors

TL;DR: In this paper, the subthreshold swing of field effect interband tunnel transistors is not limited to 60 mV/dec as in the MOSFET, but instead is shown to be sub-60 mv/dec.
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