Showing papers on "Breakdown voltage published in 2005"

GaN metal-oxide-semiconductor high-electron-mobility-transistor with atomic layer deposited Al2O3 as gate dielectric

Abstract: We report on a GaN metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using atomic-layer-deposited (ALD) Al2O3 as the gate dielectric. Compared to a conventional GaN high-electron-mobility-transistor (HEMT) of similar design, the MOS-HEMT exhibits several orders of magnitude lower gate leakage and several times higher breakdown voltage and channel current. This implies that the ALD Al2O3∕AlGaN interface is of high quality and the ALD Al2O3∕AlGaN∕GaN MOS-HEMT is of high potential for high-power rf applications. In addition, the high-quality ALD Al2O3 gate dielectric allows the effective two-dimensional (2D) electron mobility at the AlGaN∕GaN heterojunction to be measured under a high transverse field. The resulting effective 2D electron mobility is much higher than that typical of Si, GaAs or InGaAs metal-oxide-semiconductor field-effect-transistors (MOSFETs).

Impact ionization MOS (I-MOS)-Part I: device and circuit simulations

Abstract: One of the fundamental problems in the continued scaling of transistors is the 60 mV/dec room temperature limit in the subthreshold slope. In part I this work, a novel transistor based on the field-effect control of impact-ionization (I-MOS) is explored through detailed device and circuit simulations. The I-MOS uses gated-modulation of the breakdown voltage of a p-i-n diode to switch from the OFF state to the ON state and vice-versa. Device simulations using MEDICI show that the I-MOS has a subthreshold slope of 5 mV/dec or lower and I/sub ON/>1 mA//spl mu/m at 400 K. Simulations were used to further explore the characteristics of the I-MOS including the transients of the turn-on mechanism, the short-channel effect, scalability, and other important device attributes. Circuit mode simulations were also used to explore circuit design using I-MOS devices and the design of an I-MOS inverter. These simulations indicated that the I-MOS has the potential to replace CMOS in high performance and low power digital applications. Part II of this work focuses on I-MOS experimental results with emphasis on hot carrier effects, germanium p-i-n data and breakdown in recessed structure devices.

Carbon nanotube Schottky diodes using Ti-Schottky and Pt-ohmic contacts for high frequency applications

Abstract: We have demonstrated Schottky diodes using semiconducting single-walled nanotubes (s-SWNTs) with titanium Schottky and platinum Ohmic contacts for high-frequency applications. The diodes are fabricated using angled evaporation of dissimilar metal contacts over an s-SWNT. The devices demonstrate rectifying behavior with large reverse bias breakdown voltages of greater than 15 V. To decrease the series resistance, multiple SWNTs are grown in parallel in a single device, and the metallic tubes are burnt-out selectively. At low biases these diodes showed ideality factors in the range of 1.5 to 1.9. Modeling of these diodes as direct detectors at room temperature at 2.5 terahertz (THz) frequency indicates noise equivalent powers (NEP) potentially comparable to that of the state-of-the-art gallium arsenide solid-state Schottky diodes, in the range of 10-13 W(square root)xHz.

High-voltage normally off GaN MOSFETs on sapphire substrates

Abstract: Gallium nitride self-aligned MOSFETs were fabricated using low-pressure chemical vapor-deposited silicon dioxide as the gate dielectric and polysilicon as the gate material. Silicon was implanted into an unintentionally doped GaN layer using the polysilicon gate to define the source and drain regions, with implant activation at 1100/spl deg/C for 5 min in nitrogen. The GaN MOSFETs have a low gate leakage current of less than 50 pA for circular devices with W/L=800/128 /spl mu/m. Devices are normally off with a threshold voltage of +2.7 V and a field-effect mobility of 45 cm/sup 2//Vs at room temperature. The minimum on-resistance measured is 1.9 m/spl Omega//spl middot/cm/sup 2/ with a gate voltage of 34 V (W/L=800/2 /spl mu/m). High-voltage lateral devices had a breakdown voltage of 700 V with gate-drain spacing of 9 /spl mu/m (80 V//spl mu/m), showing the feasibility of self-aligned GaN MOSFETs for high-voltage integrated circuits.

Impact ionization MOS (I-MOS)-Part II: experimental results

Abstract: Part I of this paper dealt with the fundamental understanding of device physics and circuit design in a novel transistor, based on the field-effect control of impact-ionization (I-MOS). This paper focuses on experimental results obtained on various silicon-based prototypes of the I-MOS. The fabricated p-channel I-MOS devices showed extremely abrupt transitions from the OFF state to the ON state with a subthreshold slope of less than 10 mV/dec at 300 K. These first experimental prototypes of the I-MOS also showed significant hot carrier effects resulting in threshold voltage shifts and degradation of subthreshold slope with repeated measurements. Hot carrier damage was seen to be much worse in nMOS devices than in pMOS devices. Monte Carlo simulations revealed that the hot carrier damage was caused by holes (electrons) underneath the gate in pMOS (nMOS) devices and, thus, consequently explained the difference in hot carrier effects in p-channel versus n-channel I-MOS transistors. Recessed channel devices were also explored to understand the effects of surfaces on the enhancement in the breakdown voltage in I-MOS devices. In order to reduce the breakdown voltage needed for device operation, simple p-i-n devices were fabricated in germanium. These devices showed much lower values of breakdown voltage and excellent matches to MEDICI simulations.

Influence of surface defect charge at AlGaN-GaN-HEMT upon Schottky gate leakage current and breakdown voltage

Abstract: The relation between Schottky gate leakage current and the breakdown voltage of AlGaN-GaN high-electron mobility transistors (HEMTs) is discussed based on the newly introduced simple, yet useful, surface defect charge model. This model represents the leakage current caused by the positive charge in the surface portion of AlGaN layer induced by process damage such as nitrogen vacancies. The new model has been implemented into a two-dimensional device simulator, and the relationship between the gate leakage current and the breakdown voltage was simulated. The simulation results reproduced the relationship obtained experimentally between the leakage current and the breakdown voltage. Further simulation and experiment results show that the breakdown voltage is maintained even if the defect charge exists up to the defect charge density of 2.5/spl times/10/sup 12/ cm/sup -2/, provided the field plate structure is adopted, while the breakdown voltage shows a sudden drop for the defect density over 5/spl times/10/sup 11/ cm/sup -2/ without the field plate. This result shows that the field plate structure is effective for suppressing the surface charge influence on breakdown voltage due to the relaxation of the electric field concentration in the surface portion of the AlGaN layer.

Photoresponse of n-ZnO∕p-SiC heterojunction diodes grown by plasma-assisted molecular-beam epitaxy

Abstract: High quality n-ZnO films on commercial p-type 6H–SiC substrates have been grown by plasma-assisted molecular-beam epitaxy, and n-ZnO∕p-SiC heterojunction mesa structures have been fabricated. Current-voltage characteristics of the structures had a very good rectifying diode-like behavior with a leakage current less than 2×10−4A∕cm2 at −10V, a breakdown voltage greater than 20V, a forward turn on voltage of ∼5V, and a forward current of ∼2A∕cm2 at 8V. Photosensitivity of the diodes was studied at room temperature and a photoresponsivity of as high as 0.045A∕W at −7.5V reverse bias was observed for photon energies higher than 3.0eV.

Characterization of in-grown stacking faults in 4H–SiC (0001) epitaxial layers and its impacts on high-voltage Schottky barrier diodes

Abstract: The density, shape and structure of in-grown stacking faults in 4H–SiC (0001) epitaxial layers have been characterized by cathodeluminescence, photoluminescence and high-resolution transmission electron microscopy. These analyses indicate that in-grown stacking faults are of 8H structure, and are generated mostly near the epilayer/substrate interface during chemical vapor deposition. The impact of the stacking faults on the performance of 4H–SiC (0001) Schottky barrier diodes has been investigated. It is revealed that the stacking faults cause the lowering of Schottky barrier height as well as the decrease of breakdown voltage.

Enhancement of breakdown voltage by AlN buffer layer thickness in AlGaN∕GaN high-electron-mobility transistors on 4in. diameter silicon

Abstract: Enhancement of breakdown voltage (BV) with the increase of AlN buffer layer thickness was observed in AlGaN∕GaN high-electron-mobility transistors (HEMTs) grown by metalorganic chemical vapor deposition on 4in. Si. The enhancement of device performance with AlN buffer thickness (200 and 300nm) is due to the reduction of electrically active defects from Si substrate. The reduction of defects from Si with the increase of AlN thickness was confirmed by x-ray rocking curve measurements. Not much change has been observed in ON-state BV (BV:ON) values except in devices with 500‐nm-thick buffer layer. About 46% enhancement in OFF-state BV (BV:OFF) was observed on 200μm wide HEMTs with 300nm thick AlN buffer layer when compared to HEMTs with 8nm thick AlN buffer layer. The location of junction breakdown in the device was identified as GaN∕AlN∕Si interface. The measured specific on-resistance (Ron) values for 200 and 400μm wide HEMTs with 300nm thick buffer layers were 0.28 and 0.33mΩcm2, respectively. About an or...

A Passive EMI Filter for Eliminating Both Bearing Current and Ground Leakage Current from an Inverter-Driven Motor

Abstract: This paper presents a practical approach to eliminating both bearing current and ground leakage current from an inverter-driven motor rated at 400 V and 3.7 kW. When the shaft voltage with respect to the motor frame exceeds the dielectric breakdown voltage of thin lubricating grease films in two metal bearings at the drive and non-drive ends, an electrical discharge machining (EDM) current flows through the bearings. A passive EMI filter can keep the shaft voltage in check, as a result of having eliminated high-frequency common-mode voltage from the motor terminals. Hence, no dielectric breakdown occurs in the grease films, so that no EDM current flows in the bearings. Experimental results verify the viability and effectiveness of the passive EMI filter designed in this paper

AlGaN/GaN power HFET on silicon substrate with source-via grounding (SVG) structure

Abstract: We have developed a high-power AlGaN/GaN HFET fabricated on 4-in conductive Si substrate with a source-via grounding (SVG) structure. The SVG structure enables efficient chip layout and high packing density by the vertical configuration. By establishing a high-quality epitaxial technology on a Si substrate and by significantly reducing the parasitic resistance, a very low specific on-state resistance of 1.9 m/spl Omega//spl middot/cm/sup 2/ is achieved. The breakdown voltage is as high as 350 V, which is attributed to the Si substrate acting as a backside field plate. Because of reduction of the parasitic inductance, very high level of current (2.0 kA/cm/sup 2/) transients, i.e., a turn-on time of 98 ps and a turn-off time of 96 ps, are successfully measured for the first time.

Gate current leakage and breakdown mechanism in unpassivated AlGaN∕GaN high electron mobility transistors by post-gate annealing

Abstract: Gate leakage/breakdown mechanism in unpassivated AlGaN∕GaN high electron mobility transistors (HEMTs) is investigated by performing temperature-dependent pulsed current–voltage (I–V) and current transient measurements of AlGaN∕GaN HEMTs without and with annealing after Schottky gate formation. After post-gate annealing, the devices exhibited significantly smaller gate leakage current and higher breakdown voltage even without any gate dielectrics or passivation layer. The temperature-dependent current transient measurements show that the current dispersion in the unannealed HEMTs is attributed to traps with an emission time constant (tE) of ∼0.5μs at 295 K and an activation energy of ∼38meV. On the contrary, the 20-min annealed devices have traps with tE of 21.6μs at 295 K and an activation energy of ∼0.31eV. The results suggest that the post-gate annealing removes shallow traps, and creates or activates deeper traps. We propose that the breakdown and gate leakage current is mainly due to the emission current from shallow traps in unpassivated AlGaN∕GaN HEMTs. The breakdown voltage improvement after the post-gate annealing is due to the removal of shallow traps near the Schottky gate metal∕AlGaN interface.

Planar edge termination design and technology considerations for 1.7-kV 4H-SiC PiN diodes

Abstract: This paper presents the design, fabrication, and comparison of different planar edge termination techniques on high-voltage 4H-SiC PiN diodes, including single- and double-junction termination extensions (JTE), floating guard rings, and a novel termination structure, the so-called "floating guard rings-assisted JTE." The influence of the anode metal edge location over different periphery regions on the breakdown voltage is also discussed, as well as the effect of a field plate and the passivation layer on the reverse characteristics. The terminations were studied by way of two-dimensional numerical device simulations and they are confirmed by fabricating and measuring 1.7-kV 4H-SiC aluminum implanted PiN diodes. It is shown that the novel termination structure provides the best results achieving the highest breakdown voltages with good production yield. The fabricated diodes also exhibited excellent forward current characteristics with a low on-state voltage drop of 3.0 V at 100 A/cm/sup 2/, thanks to the low specific contact resistivity achieved (/spl rho//sub C/=1/spl middot/10/sup -5/ /spl Omega/cm/sup 2/) after the high-temperature treatment of the anode contact. High-temperature reverse current-voltage measurements were also carried out and are presented and discussed.

Design optimization of high breakdown voltage AlGaN-GaN power HEMT on an insulating substrate for R/sub ON/A-V/sub B/ tradeoff characteristics

Abstract: High breakdown voltage AlGaN-GaN power high-electron mobility transistors (HEMTs) on an insulating substrate were designed for the power electronics application. The field plate structure was employed for high breakdown voltage. The field plate length, the insulator thickness and AlGaN layer doping concentration were design parameters for the breakdown voltage. The optimization of the contact length and contact resistivity reduction were effective to reduce the specific on-resistance. The tradeoff characteristics between the on-resistance and the breakdown voltage can be improved by the optimization of the above design parameters, and the on-resistance can be estimated to be about 0.6 m/spl Omega//spl middot/cm/sup 2/ for the breakdown voltage of 600 V. This on-resistance is almost the same as that for the device on a conductive substrate.

Acoustic galvanic isolator incorporating single insulated decoupled stacked bulk acoustic resonator with acoustically-resonant electrical insulator

Abstract: Embodiments of the acoustic galvanic isolator comprise a carrier signal source, a modulator connected to receive an information signal and the carrier signal, a demodulator, and an electrically-isolating acoustic coupler connected between the modulator and the demodulator. The acoustic coupler comprises no more than one decoupled stacked bulk acoustic resonator (IDSBAR). An electrically-isolating acoustic coupler based on a single IDSBAR is physically small and is inexpensive to fabricate yet is capable of passing information signals having data rates in excess of 100 Mbit/s and has a substantial breakdown voltage between its inputs and its outputs.

Remote AP-PECVD of Silicon Dioxide Films from Hexamethyldisiloxane (HMDSO)

Abstract: In this paper we report on a study of an AP-PECVD process based on a simple, and very inexpensive, dielectric barrier discharge using a standard mains supply frequency. We have investigated the effect of a range of deposition parameters on the properties of silicon oxide layers grown from a HMDSO/O 2 /Ar system. It is shown that the flux of energetic species from the discharge generation is a critical parameter in determining the growth rate and characteristics of the deposited films. Growth rates up to 10 nm min -1 can be achieved and layer properties, such as refractive index and breakdown voltage, are comparable with those obtained by more conventional CVD processes. General optimum conditions for high growth rates and good quality films can be inferred from the results.

Experimental demonstration of pseudomorphic heterojunction bipolar transistors with cutoff frequencies above 600GHz

Abstract: Pseudomorphic InP∕InGaAs heterojunction bipolar transistors (PHBTs) using a compositionally graded collector (10% indium grading) and graded base (6% indium grading) to reduce the transit time of the device are reported A 04×6μm2 HBT achieves excellent ƒT values of 604GHz (associated ƒMAX=246GHz) at a collector current density of 168mA∕μm2, with a dc gain of 65 and a breakdown voltage of BVCEO=17V

12.5 nm base pseudomorphic heterojunction bipolar transistors achieving fT=710GHz and fMAX=340GHz

Abstract: The pseudomorphic collector structure is known to allow enhanced collector transport, facilitating higher current cutoff frequencies at lower current densities and junction temperatures compared to traditional single heterojunction structures. The performance of a 0.25×3μm2 pseudomorphic heteojunction bipolar transistors achieves peak fT of 710 GHz (fMAX=340GHz) at a collector current density of 20mA∕μm2. The same device achieves a fT∕fMAX of 540∕407GHz at a reduced current density of 7.5mA∕μm2. The epitaxial structure employs a 12.5 nm strained InGaAs base and 55 nm InGaAs collector, and exhibits a β of 115 and breakdown voltage of BVCEO=1.75V.

The barrier effect in dielectrics: the role of interfaces in the breakdown of inhomogeneous dielectrics

Abstract: The barrier effect in high voltage engineering is usually understood to mean an increase in the breakdown voltage of the insulation gap due to the use of additional insulation layer (a barrier) which is placed between two layers of the main dielectric. This effect has been known for more than 70 years and it is widely applied in high voltage engineering with a needle-plane configuration to increase the breakdown voltage. The noticeable progress in the barrier effect study was achieved over the last 15 years, when applying new composite polymeric materials with specific properties, the so-called nanomaterials, as the barrier materials. An analysis of existing models of the barrier effect is presented. The influences of various factors such as the barrier position in the gap, the ratio of permittivities and conductivities of the barrier and main dielectric, space charge and inhomogeneous polarization are demonstrated in this review.

Excellent frequency dispersion of thin gadolinium oxide high-k gate dielectrics

Abstract: In this letter, we reported a high-k gadolinium oxide (Gd2O3) gate dielectric formed by reactive rf sputtering. It is found that the Gd2O3 gate dielectric film exhibits excellent electrical properties such as low leakage current density, high breakdown voltage, and almost no hysteresis and frequency dispersion in C‐V curves comparable to that of HfO2 film. This indicates that postprocessing treatments can reduce a large amount of interface trap and can passivate a large amount of trapped charge at defect sites.

Study of reverse dark current in 4H-SiC avalanche photodiodes

Abstract: Temperature-dependent current-voltage (I-V) measurements have been used to determine the reverse dark current mechanisms in 4H-SiC avalanche photodiodes (APDs). A pn junction vertical mesa structure, passivated with SiO/sub 2/ grown by plasma enhanced chemical vapor deposition, exhibits predominate leakage current along the mesa sidewall. Similar APDs, passivated by thermal oxide, exhibit lower dark current before breakdown; however, when the temperature is higher than 146/spl deg/C, an anomalous dark current, which increases rapidly with temperature, is observed. This current component appears to be eliminated by the removal of the thermal oxide. Near breakdown, tunneling is the dominant dark current mechanism for these pn devices. APDs fabricated from a pp/sup -/n structure show reduced tunneling current. At room temperature, the dark current at 95% of breakdown voltage is 140 fA (1.8 nA/cm/sup 2/) for a 100-/spl mu/m diameter APD. At a gain of 1000, the dark current is 35 pA (0.44 /spl mu/A/cm/sup 2/).

Design and optimization of junction termination extension (JTE) for 4H–SiC high voltage Schottky diodes

Abstract: This paper analyzes single- and double-zone junction termination extension (JTE) structures for 4H–SiC Schottky diodes using numerical simulations. In the single-zone case, we study the effects of JTE dose, depth, length, metal/JTE overlap length, and surface or interface charge. In the double-zone case, we systematically vary the inner and outer doses over about 80 possible combinations for each of three sets of inner and outer zone widths. The total JTE width is constrained to be that necessary for optimum breakdown voltage in the single-zone case. The results are presented as contour plots of breakdown voltage and maximum surface field as a function of the two doses, with the locations of peak bulk and surface fields also indicated at each point. The resulting tolerance to variations in activated dose can then be visualized directly. The physics underlying the shapes of the contours is explained in some detail. We show that JTE behavior is significantly different for Schottky diodes compared to the better-known case of p ( i ) n junction diodes. The peak surface field is increased for Schottky diodes when the single-zone dose is reduced below its optimum value, which is opposite to the behavior of pn junctions. Moreover, double-zone JTE is not effective in reducing peak surface field for the Schottky case, unlike pn junctions, although tolerance to dose variations can be improved with two zones. The usual rule of thumb for double-zone JTE design for pn junctions is not appropriate for Schottky diodes, because of the field crowding near the sharp metal edge. We recommend an inner dose of 95–105% of the ideal single-zone and an outer dose of 70–80% of the single-zone value, with a width ratio of ∼1:1 for the inner and outer zones and a total width similar to the optimal value in a single-zone design.

Breakdown electric field calculations of hot SF/sub 6/ for high voltage circuit breaker applications

Abstract: The critical reduced electric field strengths of hot SF/sub 6/ corresponding to the dielectric recovery phase of a high voltage circuit breaker are calculated for a large temperature range (300-3000 K). Calculations are based on a multi-term Boltzmann equation solution using, in comparison to the literature works, improved cross section sets for the interactions of electrons with various SF/sub 6/ dissociated products. The obtained critical electric fields show a reasonable agreement with the available data. These results are then used in hydrodynamics simulations which correctly predicts the circuit breaker behaviors observed in the case of a successful breaking test as well as in a failed one.

Modeling of breakdown behavior in radio-frequency argon discharges with improved secondary emission model

Abstract: This work represents the investigation of the dependence of the breakdown voltage on the gas pressure and on the frequency in radio-frequency argon discharges. Calculations were performed by using a one-dimensional particle-in-cell/Monte Carlo code with three velocity components with a new secondary emission model. The obtained results show that the multivalued nature of the left-hand branch of the breakdown curve can be achieved only by taking into account energy dependence of the yield per ion. The multivalued nature of the left-hand branch of the breakdown curve is attributed to the influence of the secondary emission characteristics of the electrodes on the breakdown voltage. Simulation results show a good agreement with the available experimental data. Disagreements between simulation results and theoretical predictions based on the phenomenological method indicate that a more accurate determination of molecular constants is needed. As a result of the satisfactory agreement between simulation and experimental data for dependence of the breakdown voltage on the frequency, a frequency scaling law is proposed.

A new partial SOI power device structure with P-type buried layer

Abstract: A new BPSOI (buried layer partial SOI) structure is developed, in which the P-type buried layer is implanted into the P− substrate by silicon window underneath the source of the conventional PSOI. The mechanism of breakdown is that the additional electric field produced by P-type buried layer charges modulates surface electric field, which decreases drastically the electric field peaks near the drain and source junctions. Moreover, the on-resistance of BPSOI is decreased as a result of increasing drift region doping due to neutralism of P-type buried layer. The results indicate that the breakdown voltage of BPSOI is increased by 52–58% and the on-resistance is decreased by 45–48% in comparison to conventional PSOI in virtue of 2-D numerical simulations using MEDICI.

Influence of impurities on the uniform atmospheric-pressure discharge in helium

Abstract: The influence of small nitrogen impurities on the uniform barrier discharge at atmospheric pressure in helium is investigated by numerical simulation with a one-dimensional fluid model. The simulation results show that in different discharge modes the influence of impurities is completely different. For glow discharge, small impurities result in the breakdown voltage dropping and thus cause the decrease in charged particle densities and discharge current density. In the case of Townsend discharge, nitrogen impurities can lead to the increase of charged particle densities and discharge current density, and even the change of discharge mode, but do not have a distinct impact on the breakdown voltage.

Influences of degree of curing and presence of inorganic fillers on the ultimate electrical properties of epoxy-based composites: experiment and simulation

Abstract: This paper describes both an experimental study and a numerical investigation of the breakdown field in particle reinforced thermosets. The experimental study revealed that the increase of the conversion degree (α) of the epoxy matrix improved the breakdown voltages both in divergent and quasi-homogeneous fields. It was also observed that the presence of the second phase (mineral filler) dispersed within the polymeric host led to apparently contradictory results depending on the nature of the electric field. The neat matrix exhibited a higher field to breakdown than that of the composite in a quasi-homogeneous field configuration whereas the opposite behaviour was evidenced in a point–plane configuration. It thus appeared that the filler can either increase or decrease the breakdown voltage, depending on the nature of the electrode configuration. To further understand this behaviour, a deterministic numerical simulation of the dielectric breakdown that accounts for the organization within real composites was developed. This numerical method, based on the resistor–short breakdown model was improved to directly account for the real phase arrangement within the samples through scanning electron micrographs. The simulation furnished the explanation for the apparent disagreement, showing that the inorganic particles protect the composite in divergent fields through a mechanism similar in nature to the so-called barrier effect, whereas the same fillers were responsible for a local intensification of the electric field and thereby a reduction of the dielectric strength in a quasi-homogeneous field.

Enhanced breakdown voltage electrode

Abstract: Particles of active electrode material are made by blending and fibrillizing (i.e., fibrillating) a mixture of activated carbon, conductive carbon, and fibrillizable binder. In selected embodiments, chloride level in the activated carbon is relatively low, a small amount of conductive carbon with low impurity levels and high conductivity is used, and the binder is inert. For example, chloride content of the activated carbon is below 50 ppm, and total impurities in the conductive carbon are below 120 ppm. The mixture may include about 10% of PTFE and 0.5% or less of conductive carbon. Blending and fibrillization may be performed without solvents. The fibrillized particles are dried, blended again to reduce clumping, and used to make active electrode material film. The film is attached to a current collector to obtain an electrode for use in various electrical devices, including double layer capacitors. The electrode increases breakdown voltage of the capacitor electrolyte.

High on-state breakdown heterojunction bipolar transistor

Abstract: A heterojunction bipolar transistor (HBT) is provided with an improved on-state breakdown voltage VCE. The improvement of the on-state breakdown voltage for the HBT improves the output power characteristics of the HBT and the ability of the HBT to withstand large impedance mismatch (large VSWR). The improvement in the on-state breakdown voltage is related to the suppression of high electric fields adjacent a junction of a collector layer and a sub-collector layer forming a collector region of the HBT.