Showing papers on "LC circuit published in 2012"

Generalized Closed-Loop Control Schemes with Embedded Virtual Impedances for Voltage Source Converters with LC or LCL Filters

Abstract: In this paper, a generalized closed-loop control (GCC) scheme is proposed for voltage source converters (VSCs) with LC or LCL output filters. The proposed GCC scheme has a single-loop control of inverter output (voltage or current) and two parallel virtual impedance terms using additional measurements. The virtual impedance can be the equivalent internal impedance or external impedance (or both), depending on their control term and feedback variable selection. The internal impedance term is mainly responsible for providing desired damping to the filter circuit, and the external virtual impedance term can effectively adjust the converter system closed-loop output impedance. As each term in the GCC scheme can be controlled independently, the proposed GCC scheme has great flexibility and can easily realize and explain the performances of the traditional single- and multiloop control schemes and their different variations. Moreover, the GCC scheme provides a distinct physical meaning of each control term, which makes the control parameter tuning more straightforward and robust. Additionally, as shown in this paper, the proposed GCC scheme can tackle some traditionally challenging control objectives by avoiding the harmonics filtering or derivative terms. Experimental results from laboratory VSC prototypes are obtained to validate the proposed GCC scheme.

Efficient Analysis of Frequency-Selective Surfaces by a Simple Equivalent-Circuit Model

Abstract: The transmission and reflection properties of frequency-selective surfaces (FSSs) are evaluated through a simple and accurate first-order circuit approach The approximate analysis, based on the parallel between real structure and a lumped-LC-network counterpart, is also useful for acquiring physical insights into the working principles of frequency-selective surfaces The first part of the paper describes a technique for computing lumped parameters of the most common frequency-selective-surface elements The L and C parameters representing a given frequency-selective-surface element are derived only one time, at normal incidence, and stored, so as to form a database The second part of the paper deals with the derivation of simple relations allowing the generalization of the stored LC couples in the case where the frequency-selective surface is printed or embedded in arbitrarily thick dielectric slabs, when the incident angle is varied from normal incidence, or if a different periodicity with respect to the reference periodicity is adopted The generalized lumped parameters are included in an equivalent transmission line for computing the response of generic frequency-selective-surface configurations with no additional computational effort The results obtained through the simplified model presented here are verified by a careful comparison with MoM simulations

Large-Signal Stabilization of a DC-Link Supplying a Constant Power Load Using a Virtual Capacitor: Impact on the Domain of Attraction

Abstract: It is known that the interaction between poorly damped LC input filters and constant power loads (CPLs) leads to degradation of dynamic performance or system instability. This paper addresses a large-signal stability study and stabilization of an electrical system containing a dc power supply, an LC filter, and a CPL. This latter is realized here by a voltage source inverter supplying a motor drive. To stabilize the system, the control structure is slightly modified to implement a nonlinear stabilization block that virtually increases the dc-link capacitance and, hence, the damping of the system. The main idea consists in adding a capacitive power component to the CPL power reference. This allows reducing the real dc-link capacitance value and volume, which is, for weight and size reasons, an important issue in aerospace applications. The impact on the large-signal stability will be analyzed by estimating the domain of attraction of the operating point. An illustrative example consisted of an LC input filter connected to an inverter-permanent-magnet synchronous motor designed for aircraft applications treated by simulations and experimentation, which confirm the validity of the proposed approach.

A New Z-Source DC Circuit Breaker

Abstract: A novel type of circuit breaker is introduced for operation at medium-voltage dc with future naval ship power systems as a targeted application. The breaker utilizes a z-source LC circuit in order to automatically commutate a main-path SCR during a fault. Compared to existing dc circuit breakers, the z-source breaker features fast turn-off, simple control, and the source does not experience the fault current. The operation and analysis of the new breaker is presented. Component sizing is carried out for three medium-voltage power levels. Incorporation of the new breaker within a drive system is also explored. Laboratory validation is carried out on a low-voltage prototype.

A Low-Phase-Noise Wide-Tuning-Range Oscillator Based on Resonant Mode Switching

Abstract: In this paper we will present a low-phase-noise wide-tuning-range oscillator suitable for scaled CMOS processes. It switches between the two resonant modes of a high-order LC resonator that consists of two identical LC tanks coupled by capacitor and transformer. The mode switching method does not add lossy switches to the resonator and thus doubles frequency tuning range without degrading phase noise performance. Moreover, the coupled resonator leads to 3 dB lower phase noise than a single LC tank, which provides a way of achieving low phase noise in scaled CMOS process. Finally, the novel way of using inductive and capacitive coupling jointly decouples frequency separation and tank impedances of the two resonant modes, and makes it possible to achieve balanced performance. The proposed structure is verified by a prototype in a low power 65 nm CMOS process, which covers all cellular bands with a continuous tuning range of 2.5-5.6 GHz and meets all stringent phase noise specifications of cellular standards. It uses a 0.6 V power supply and achieves excellent phase noise figure-of-merit (FoM) of 192.5 dB at 3.7 GHz and >; 188 dB across the entire tuning range. This demonstrates the possibility of achieving low phase noise and wide tuning range at the same time in scaled CMOS processes.

Asymmetric PWM Control Scheme During Hold-Up Time for $LLC$ Resonant Converter

Abstract: To narrow down the switching-frequency-variation range of an LLC resonant converter, asymmetric pulsewidth modulation (APWM) of the hold-up time is proposed. During the hold-up time, the modulation method of an LLC resonant converter is changed from frequency modulation (FM) to APWM. Since the LLC resonant converter achieves a higher gain with APWM than it does with FM at the same switching frequency, the switching-frequency-variation range is reduced. Therefore, an optimal design of the magnetic components is possible, resulting in a high efficiency under normal operation and a high power density. The proposed control scheme is applied to an 85-W LLC resonant converter.

Active Damping of Output $LC$ Filter Resonance for Vector-Controlled VSI-Fed AC Motor Drives

Abstract: For longer life of alternating-current (ac) machines, it is desirable to feed them by sinusoidal voltages. This can be achieved by connecting an LC filter between the voltage source inverter and the motor. However, the LC filter creates unwanted oscillation at system resonant frequency. A resistance connected in series with the capacitor is a solution to damp out the resonant-frequency oscillation, but this damping technique increases loss in the system. In this paper, a simple active damping technique is proposed for lossless damping of vector-controlled ac motor drives with an LC filter. In the proposed technique, the resistance drop is emulated in the control using the terminal motor voltages. The proposed technique is carried out in the three-phase domain for better accuracy of the control. The proposed technique neither affects the dynamic response of the drive nor changes the design of the standard vector control loops. Results from experimental ac motor drives are presented.

Inverse Watkins–Johnson Topology-Based Inverter

Abstract: A Z-source inverter (ZSI) uses an L-C impedance network between the source and the voltage source inverter (VSI). It has the property of stepping down or stepping up the input voltage, as a result, the output can be either higher or lower than the input voltage as per requirement. This topology also possesses robust electromagnetic interference noise immunity, which is achieved by allowing shoot through of the inverter leg switches. This letter proposes an inverter circuit based on the inverse Watkins-Johnson (IWJ) topology that can achieve similar advantages as that of a ZSI. The proposed circuit requires two switches and one pair of an LC filter apart from the VSI. The systematic development of this inverter topology is described starting from the basic IWJ circuit. Steady-state analysis and implementation of the proposed topology are also described. The pulse width modulation control strategy of the inverter is explained. An experimental prototype is used to validate the proposed circuit.

Flatness-Based Control of Three-Phase Inverter With Output $LC$ Filter

Abstract: Recently, hybrid electrical power sources composed of storage elements and renewable energy sources are known to have made great development. These energy sources are connected to a dc bus and need a dc-to-ac converter to transfer the produced energy to the grid. Three-leg voltage source inverters equipped with an output LC filter are often used. The main objective of this stage is to generate a three-phase sinusoidal voltage with defined amplitude and to ensure the smallest harmonic distortion rate of the output voltage for any load conditions. To satisfy the defined objectives, we present in this paper a new control method based on differential flatness control technique. The main interest of this control method is the possibility to define the behavior of the state variable system in the steady state as well as in transients. The use of only one control loop allows obtaining high dynamic properties of the system which ensure small harmonic distortion rate of the output voltage. Experimental results under balanced, unbalanced, and nonlinear load conditions are presented and validate the effectiveness of the proposed control methods.

Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios

Abstract: This work presents complete analysis of both one- port and two-port dual-band oscillators using transformer-based fourth-order LC tanks, from which critical parameters including oscillation frequency, start-up condition, tank Q, phase noise-are thoroughly derived and compared. It is shown that one-port oscillators consume less power than two-port counterparts but may suffer from stability problem which can be solved by a notch-peak cancellation technique. On the other hand, compared to one-port oscillators, two-port oscillators need to consume more power to obtain the same output swing, but their phase noise can be improved more linearly with increasing bias current, and thus they can achieve lower phase noise with a sufficiently large bias current. Based on the results, a dual-band quadrature voltage- controlled oscillator (Q-VCO) is systematically designed and implemented in a 0.13- m CMOS process for software-defined -radio (SDR) applications, in which the two-port topology is used in the low band for low phase noise and the one-port topology is employed in the high band for low power consumption. The prototype achieves a dual-band operation with in-phase and quadrature-phase (IQ) output signals from 2.7 GHz to 4.3 GHz and from 8.4 GHz to 12.4 GHz. At 3.6 GHz and 10.4 GHz, phase noise at 3 MHz offset of dBc/Hz and dBc/Hz and sideband-rejection ratios (SBR) of 37 dB and 41 dB are measured, respectively.

A Generalized Dual-Band Wilkinson Power Divider With Parallel $L, C,$ and $R$ Components

Abstract: A generalized model of a two-way dual-band Wilkinson power divider (WPD) with a parallel LC circuit at midpoints of two-segment transformers is proposed and compared with that of a conventional two-way dual-band WPD with a parallel LC circuit at the ends of two-segment transformers. The sum of power reflected at an output port and power transmitted to an isolation port from another isolation port in the proposed divider is smaller than that in the conventional divider. Therefore, wide bandwidths for S22, S33, and S32 can be expected for proposed dividers. In the case of equal power division, frequency characteristics of return loss at output ports and isolation of the proposed divider are wider than those of the convention one. The resonant frequencies of LC circuits in the proposed divider and a conventional divider are equal; however, the inductance L used in the proposed divider is always smaller than that in the conventional divider. Design charts and calculated bandwidths as a function of frequency ratio from 1 to 7 are presented. In experiments, two symmetrical and two asymmetrical circuits were fabricated. The experimental results showed good agreement with theoretical results.

Passive Circuit Technologies for mm-Wave Wireless Systems on Silicon

Abstract: The performance characteristics of transmission lines, silicon integrated waveguides, tunable LC resonators and passive combiners/splitters and baluns are described in this paper. It is shown that Q-factor for an on-chip LC tank peaks between 20 and 40 GHz in a 65 nm RF-CMOS technology; well below the bands proposed for many mm-wave applications. Simulations also predict that the Q-factor of differential CPW transmission lines on-chip can exceed 20 at 60 GHz in RF-CMOS when a floating shield is applied, outperforming unshielded variants employing more advanced metal stacks. A PA circuit demonstrator for advanced on-chip passive power combiners, splitters and baluns realizes peak-PAE of 18% and Psat better than 20 dBm into a 50 Ω load at 62 GHz. An outlook to the enablement of digitally intensive mm-wave ICs and low-loss passive interconnections (0.15 dB/mm measured loss at 100 GHz) concludes the paper.

Controlling Conducted Emissions by Design

Abstract: I. Fundamentals of Conducted Emission Design.- 1. Designing for EMC.- 1.1 Noise (EMI).- 1.2 EMI Source, Path, and Victim.- 1.3 Conductive Paths.- 1.4 Conduction or Radiation?.- 1.5 Design to Control Conducted Emissions.- 2. EMI Spectrum.- 2.1 Time and Frequency Domains.- 2.2 Description of FFT Software.- 2.3 Data Interpretation.- 2.4 Bare Bones FFT.- 2.5 Methods of Inputting Data to FFT.- 2.6 An Enhanced Version of FFT.- 2.7 Examples of FFT Conversions from Time to Frequency Domains.- 2.8 Some Possible Pitfalls.- 2.9 Subharmonics.- 3. Capacitor Modeling.- 3.1 The Capacitor Model.- 3.2 Parasitic Elements of Capacitors.- 3.3 Capacitor Types.- 3.4 Capacitor Voltage Ratings.- 4. Inductor Modeling.- 4.1 Inductor Losses.- 4.2 Inductor Capacitance.- 4.3 Air Core with Conductor Near Experiment.- 4.4 Inductor Cores Form Capacitive Paths.- 4.5 Inductor Impedance Curve.- 4.6 Parasitic Elements of Inductors.- 4.7 Simulation.- 5. Balun Modeling.- 5.1 Differential Mode Flux.- 5.2 Common Mode Flux.- 5.3 The Truth about Windings on Inductor Cores.- 5.4 Coupling K Factor.- 5.5 Differential Balun Inductance.- 5.6 Common Mode Balun Inductance.- 5.7 Effects of Load and Source Resistances on Attenuation.- 5.8 Balun Driving Impedance.- 5.9 Balanced Circuits.- 5.10 Design Criteria.- 5.11 Model.- 6. Filters.- 6.1 Parasitic Inductances and Capacitances.- 6.2 Academic LC Filter.- 6.3 Simple Real World LC Filter.- 6.4 Control Parasitics by Design.- 6.5 Parasitics Caused by Circuit Layout.- 6.6 Filter Circuit Design.- 6.7 Characteristic Impedance of LC Filters.- 6.8 Parallel Capacitors to Lower the ESR.- 6.9 LC Filter.- 6.10 Line Impedance Stabilization Networks.- 6.11 Filter Layout and Packaging Design.- 7. Grounding Electronic Circuits.- 7.1 Grounding.- 7.2 Safety Grounds.- 7.3 Ground Geometries.- 7.4 Ground Design for Packaging ElectronicCircuitry.- 7.5 Shielding.- 8. EMI Analysis.- 8.1 EMI Modeling.- 8.2 EMI Analysis Using SPICE.- II. Advanced Conducted Emission Design.- 9. EMC Regulations.- 9.1 FCC.- 9.2 VDE.- 9.3 MIL-STD-461.- 9.4 Voltage/LISN Measurement Method.- 9.5 Current/Capacitor Measurement Method.- 9.6 A Comparison of Some of the RF Conducted Emissions Standards.- 10. Switch Mode Power Supplies.- 10.1 Typical Power Supply Block Diagram.- 10.2 Typical Switch Mode Power Supply EMI Problem Areas.- 10.3 EMI Simulation and Laboratory EMI Test Setup.- 10.4 SMPS EMI Design Example.- 10.5 Model the Problem.- 10.6 Simulation Problems.- 10.7 Back to Fundamental Model.- 10.8 Identify the Players.- 10.9 Other Types of EMI Modeling for SMPS.- 10.10 Conclusion.- 11. Transistor and Diode Packaging Problem for EMI.- 11.1 New Semiconductor Device Packages.- 11.2 Common Mode Shorting Screens.- 11.3 Typical System with Power Conversion.- 11.4 Common Mode Current Paths.- 11.5 Conducted Emissions Reduction by Choice of Package.- 12. Circuit Examples.- 12.1 Example 1.- 12.2 Example 2.- 12.3 Example 3 (FFT).- 13. Computers and Digital Logic Circuitry.- 13.1 Conducted Emissions Coupling Paths.- 13.2 Sequential Logic and Clocks.- 13.3 Example of Internal Conducted Emissions.- 13.4 What Is the Best Bypass Capacitor?.- 13.5 Power Entry Capacitor.- 14. What This Analysis Method Is Not.- 14.1 Diagnostics.- 14.2 Fields.- 14.3 Radiation.- 14.4 Characteristic Impedances of Common Pairs of Conductors.- 14.5 Shortcomings of EMI Test Simulation as Described Herein.- 15. Magnetic Saturation Modeling.- 15.1 The Polarization of Magnetic Domains.- 15.2 Device, Core, and Material Properties.- 15.3 Core Geometry Effects.- 15.4 Effects of Cores Made of Two Different Materials.- 15.5 Some Crucial Parameters to Model Saturation.- 15.6 Methods of Integrating Voltage.- 15.7 Dr. Lauritzen's Saturation Model.- 15.8 The Core Geometry and Material Porosity Region of the B-H Loop.- 15.9 Curve Fitting versus Parametric Models.- 15.10 Conclusion.- Appendix. BASIC FFT.

Multi-loop linear resonant voltage source inverter controller design for distorted loads using the linear quadratic regulator method

Abstract: In this study, an optimal multi-loop linear resonant control structure for a voltage source inverter (VSI) coupled to an inductor-capacitor (LC) filter is proposed for supplying nonlinear loads. A resonant controller ensures that sinusoidal voltage references are properly tracked and sinusoidal current disturbances are rejected without steady-state error under stable conditions. A desired transient response, on the other hand, can only be obtained by properly setting the controller coefficients. Further challenges include the reduction of output total harmonic distortion (THD), improving the damping of the LC resonance frequency and preventing the generation of fast closed-loop modes, which surpass the bandwidth of the inverter. The proposed technique is an extension of the classic linear quadratic regulator (LQR) that addresses the optimal tracking problem and provides a simple and step-by-step problem solving without stability or robustness issues. Additionally, the study also presents an improved controller to further reduce the voltage distortions for applications requiring acute accuracy. The designed controller is simulated and experimentally tested. The results are presented, discussed and confirmed against analytical derivations.

Non-isolated resonant converter

Abstract: A non-isolated resonant converter is provided. The provided non-isolated resonant converter includes a switch circuit, a resonant circuit and a rectifying-filtering circuit. The switch circuit, the resonant circuit and the rectifying-filtering circuit are sequentially connected. The resonant circuit includes an auto-transformer, a capacitor and an inductor, wherein the capacitor and the inductor are connected to the auto-transformer. The configuration of the provided non-isolated resonant converter has small size, low loss and high power density.

13 GHz CMOS Active Inductor LC VCO

Abstract: A 13 GHz active inductor LC voltage controlled oscillator (VCO) has been realized in 90 nm CMOS technology by ST-Microelectronics. The VCO consists of two complementary cross-coupled pairs, an active LC tank implemented by means of a differential high-Q low-noise active inductor and two p-MOSFET varicaps, and an output buffer stage. The measurements show a phase noise of -105.25 dBc/Hz at 1 MHz frequency offset. The current consumption of the VCO core and differential boot-strapped inductor amount to 0.7 and 1.8 mA, respectively, from a 1.2 V supply voltage.

Phase locked loop with phase correction in the feedback loop

Abstract: A frequency synthesizer circuit is disclosed. The frequency synthesizer circuit includes a comparator circuit coupled to a reference clock and a phase-corrected output signal. The frequency synthesizer circuit also includes a loop filter coupled to the comparator circuit. The frequency synthesizer circuit also includes an oscillator coupled to the loop filter. The frequency synthesizer circuit also includes a fractional divider coupled to an output of the oscillator. The frequency synthesizer circuit also includes phase correction circuitry that corrects a phase of an output of the fractional divider to produce the phase-corrected output signal.

Average current-mode control for LLC series resonant dc-to-dc converters

Abstract: Conventional voltage mode control only offers limited performance for LLC series resonant dc-to-dc converters experiencing wide variations in operating conditions. This paper presents average current mode control which could consistently provide good closed-loop performance for LLC resonant converters for the entire operational range. The proposed control scheme employs an additional feedback from the current of the resonant tank network to overcome the limitation of the existing voltage mode control. The principles, implementation and performance of the average current mode control scheme are investigated to identify their respective merits and limitations compared with conventional control schemes. The accuracy of dynamic analysis and validity of control design are confirmed with both computer simulations and experimental measurements using 150W prototype converter.

A 1-mW 1.13–1.9 GHz CMOS LC VCO Using Shunt-Connected Switched-Coupled Inductors

Abstract: A low-power wideband LC VCO has been designed and implemented in a 90-nm CMOS technology. Wide tuning range, low phase noise and low power consumption are achieved thanks to the adopted LC tank, which makes use of shunt-connected switched-coupled inductors and a proper arrangement of varactors. The shunt-connected switched-coupled inductors provide coarse tuning and phase noise optimization without using amplitude calibration loop or trimming of the bias current. The proposed varactors configuration employs accumulation mode thin and thick MOS devices, which has been differently biased to obtain tuning range maximization along with minimization of the amplitude-to-phase noise conversion. The LC-tank topology and inductor layout have been properly designed to attain a die area comparable to a single-inductor VCO, taking advantage of the inductors mutual coupling. The VCO exhibits a phase noise at 1-MHz offset frequency lower than -114 dBc/Hz over the entire tuning range and achieves -126.1 dBc/Hz at 1.2 GHz. It provides a tuning range of 51% from 1.13 GHz to 1.9 GHz with a tuning voltage ranging from 0 to 1.2 V. Despite a very low current consumption, which is 0.88 mA from a 1.2-V supply, the proposed VCO has the outstanding PFTN figure-of-merit of 10. The VCO core die area is 0.5 mm2.

CMOS THz Generator With Frequency Selective Negative Resistance Tank

Abstract: This paper reports a CMOS terahertz oscillator with a novel frequency selective negative resistance (FSNR) tank to boost its operating frequency. The demonstrated oscillator can operate at a fundamental frequency of about 0.22 THz, exceeding the CMOS device cutoff frequency of fT. The proposed architecture suppresses undesired 2nd and odd harmonics and boosts the fourth-order harmonic (0.87 THz), which radiates through an on-chip patch antenna. The THz oscillator's output spectrum is profiled by using a Michelson interferometer. The oscillator circuit consumes 12 mA from a 1.4 V supply and occupies a 0.045 mm2 die area in a 65 nm CMOS technology.

Wireless charging device

Abstract: The utility model provide to a wireless charging device, which comprises a transmitter and a receiver, wherein the transmitter is used for transforming an external power source into electromagnetic energy. The receiver is used for receiving the electromagnetic energy output by the receiver and transforming the electromagnetic energy into a power source signal to charge an electronic device. The transmitter comprises an LC resonance coil array, a control circuit and an AC (Alternating Current) adaptive circuit, wherein the LC resonance coil array comprises a plurality of LC resonance coils positioned in a plane, the control circuit is used for controlling the LC resonance coil array, and the AC adaptive circuit is used for receiving the external power source and supplying power for the LC resonance coil array and the control circuit. According to the utility model, the LC resonance coil array in the wireless charging device provided by the utility model comprises a plurality of LC resonance coils positioned in a plane, so that the receivers of a plurality of electronic devices can be powered up simultaneously, and the requirement of charging a plurality of electronic devices at the same time can be met.

A Dual-Resonant Mode 10/22-GHz VCO With a Novel Inductive Switching Approach

Abstract: This paper presents a novel dual-band voltage-controlled oscillator (VCO) in a standard 0.18-μm CMOS technology. With special design in the LC tank, the circuit exhibits two oscillation modes in different frequency bands. The frequency band selection is achieved by a switched coupled inductor with the tunable inductance and quality factor. This VCO can operate in a 10-GHz band with 7.6% tuning range and a 22-GHz band with 8% tuning range, while the core circuit draws a dc current of 8.44 mA from a 1.8-V supply voltage. The figures-of-merit at 10- and 22-GHz bands are - 184.63 and - 181.81 dBc/Hz, respectively. These performances are comparable with state-of-the-art dual-band LC-VCOs.

Implantable medical devices and systems having inductive telemetry and recharge on a single coil

Abstract: Implantable devices and related systems utilize a single coil for both inductive telemetry at one telemetry signal frequency and recharge at another recharge energy frequency. The coil is included in a tank circuit that may have a variable reactance. During telemetry, particularly outside of a recharge period, the reactance may be set so that the tank circuit is tuned to the telemetry frequency. During recharge, the reactance is set so that the tank circuit is tuned to the recharge frequency. Furthermore, the tank circuit may have a Q that is sufficiently small that the tank circuit receives telemetry frequency signals that can be decoded by a receiver while the tank is tuned to the recharge frequency so that telemetry for recharge status purposes may be done during the recharge period without changing the tuning of the tank circuit.

A zero voltage switching full-bridge DC-DC converter with capacitive output filter for a plug-in-hybrid electric vehicle battery charger

Abstract: In this paper, a novel zero voltage switching full-bridge converter with trailing edge pulse width modulation and capacitive output filter is presented. The target application for this work is the second stage dc-dc converter in a two stage 1.65 kW on-board charger for a plug-in hybrid electric vehicle (PHEV). For this application the design objective is to achieve high efficiency and lower cost in order to minimize the charger size, charging time and the amount and cost of electricity drawn from the utility. A detailed converter operation analysis is presented along with simulation and experimental results. In comparison to a benchmark full-bridge with LC output filter, the proposed converter reduces the reverse recovery losses in the secondary rectifier diodes, therefore enabling a converter switching frequency of 100 kHz. Experimental results are presented for a prototype unit converting 400 V from the input dc link to an output voltage range of 200 V to 450 V dc at 1650 W. The prototype achieves a peak efficiency of 95.7 %.

Composite dynamical behaviors in a simple series–parallel LC circuit

Abstract: In this paper, we report a variety of dynamical behaviors exhibited in a compact series–parallel LC circuit system comprising of two active elements, one linear negative conductance and one ordinary junction diode with piecewise linear v − i characteristics. For convenience, we consider the amplitude (Ef) and frequency (f) of the driving force as control parameters amongst various other parameters. We observe the phenomenon of antimonotonicity, torus breakdown to chaos, bubbles to chaos, period doubling to chaos and emergence of multiple attractors which follow a progressive sequence, etc. As an overview to understand many more variety of bifurcations and attractors, the construction of two parameter phase diagram is also shown pictorially. The chaotic dynamics of this circuit is realized by laboratory experiment, numerical and analytical investigations and found that the results are in good agreement with each other.

Control of ZCS-SR Inverter-Fed Voltage Multiplier-Based High-Voltage DC–DC Converter by Digitally Tuning Tank Capacitance and Slightly Varying Pulse Frequency

Abstract: Conventional pulse-frequency-modulated (PFM) zero-current switching series resonant (SR) inverter-fed voltage-multiplier-based high-voltage dc power supplies have nearly zero switching loss. However, they have limitations of poor controllability at light load and large output voltage ripple at low switching frequencies. To address these problems, this letter proposes a new control scheme that is based on digitally tuning tank capacitance and slightly varying pulse frequency of SR inverter. For the realization of the proposed control approach, the tank circuit of the resonant inverter is made up of several tank capacitors that are switched into or out of the tank circuit by electromechanical switches. By digitally modulating the tank capacitance, the output voltage changes in steps. The regulation of output voltage between two adjacent steps is achieved by slightly varying the pulse frequency. The proposed control scheme has several features, namely, a wide range of output voltage controllability even at light loads, less output voltage ripple, and less current stress on the inverter's power switches at light loads. Therefore, the proposed control approach alleviates most of the problems associated with conventional PFM. Experimental results obtained from a scaled-down laboratory prototype are presented to verify the effectiveness of the proposed system.

An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation

Abstract: A phase shift technique using capacitive source degeneration (CSD) is presented for LC quadrature voltage-controlled oscillators (QVCO), where capacitively degenerated differential pairs are used to couple the LC tanks to implement a phase-shifted transconductance and negative input resistance to compensate resonator losses, and to minimize the flicker noise contributions. The CSD technique not only introduces excess phase shift to eliminate undesired bi-modal oscillation, but inherently provides a large coupling ratio to improve quadrature phase accuracy. Compared to existing phase-shift LC-QVCOs, the proposed CSD-QVCO presents excellent phase accuracy and power efficiency. A prototype of the QVCO was fabricated in TSMC 0.18-μm CMOS technology. The measured phase noise is -120 dBc/Hz at 3-MHz offset from 5-GHz carrier, with a power consumption of 6.4 mW from a 1.2-V supply.

Distributed LC Resonant Clock Grid Synthesis

Abstract: Clock distribution networks can consume 35-70% of total chip power in high-performance designs. Resonant clocks can potentially reduce this power by recycling the energy using on-chip inductors. We propose the first automated algorithm called Resonant clOCK Synthesis (ROCKS) that includes distributed LC tank placement, a novel AC-based resonant grid buffer sizing, and resonant grid buffer incremental placement optimization. Experimental results show that using inductors limited to 30% of one metal layer, the resonant clock power can be reduced at least by 40% and the clock buffer area is reduced by at least 53% on average. With larger inductors, it is feasible to achieve up to 90% power savings.

A self-tuning external device for wirelessly recharging implantable medical devices

Abstract: External devices include circuitry that self-tunes so that current is being driven through a coil at a resonant frequency of the tank circuit including the coil. The self-tuning nature of the driver circuitry enables adaptation within a cycle to changes in the resonant frequency such as those due to changing loads on the coil. The self-tuning circuitry monitors the direction of current flow in the tank circuit so that during a non-driven phase of a two-phase cycle, the circuitry detects current naturally changing directions and activates the driver circuitry to drive current into the tank circuit in phase with the natural direction of current flow. Unity power factor is approximated while driving the coil.

Resonant Converting Circuit and Resonant Controller

Abstract: A current detecting circuit detects a resonant current in a primary side of a resonant converting circuit to generate a current detecting signal. An output detecting circuit generates a feedback signal according to the output voltage. A resonant controller generates a clock signal and adjusts an operating frequency of the clock signal in response to the feedback signal for modulating the output voltage of the resonant circuit. The resonant controller includes a resonance deviation protection unit which detects the current detecting signal according to a phase of the clock signal to determine whether the resonant circuit enters a region of zero current switching or not. When the resonant circuit enters the region of zero current switching, the resonant controller executes a corresponding protection process in response to that the resonant controller operates in a starting mode or a normal operating mode.