Showing papers on "Operational amplifier published in 1996"

Analog Integrated Circuit Design

Abstract: Partial table of contents: Integrated--Circuit Devices and Modelling. Processing and Layout. Basic Current Mirrors and Single--Stage Amplifiers. Noise Analysis and Modelling. Basic Opamp Design and Compensation. Advanced Current Mirrors and Opamps. Comparators. Switched--Capacitor Circuits. Nyquist--Rate D/A Converters. Oversampling Converters. Phase--Locked Loops. Index.

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Abstract: In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

Abstract: A new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed. It is intended for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used because it provides a good compromise between speed and power consumption. The synthesis procedure is based on the relation between the ratio of the transconductance over DC drain current g/sub m//I/sub D/ and the normalized current I/sub D//(W/L). The g/sub m//I/sub D/ indeed is a universal characteristic of all the transistors belonging to a same process. It may be derived from experimental measurements and fitted with simple analytical models. The method was applied successfully to the design of a silicon-on-insulator (SOI) micropower operational transconductance amplifier (OTA).

Synthesis of high-performance analog circuits in ASTRX/OBLX

Abstract: We present a new synthesis strategy that can automate fully the path from an analog circuit topology and performance specifications to a sized circuit schematic. This strategy relies on asymptotic waveform evaluation to predict circuit performance and simulated annealing to solve a novel unconstrained optimization formulation of the circuit synthesis problem. We have implemented this strategy in a pair of tools called ASTRX and OBLX. To show the generality of our new approach, we have used this system to resynthesize essentially all the analog synthesis benchmarks published in the past decade; ASTRX/OBLX has resynthesized circuits in an afternoon that, for some prior approaches, had required months. To show the viability of the approach on difficult circuits, we have resynthesized a recently published (and patented), high-performance operational amplifier; ASTRX/OBLX achieved performance comparable to the expert manual design. And finally, to test the limits of the approach on industrial-sized problems, we have synthesized the component cells of a pipelined A/D converter; ASTRX/OBLX successfully generated cells 2-3/spl times/ more complex than those published previously.

Electrical Engineering: Principles and Applications

Abstract: (NOTE: Each chapter concludes with Summary and Problems.) I. CIRCUITS. 1. Introduction. Overview of Electrical Engineering. Circuits, Currents, and Voltages. Power and Energy. Kirchhoff's Current Law. Kirchhoff's Voltage Law. Introduction to Circuit Elements. Introduction to Circuits. 2. Resistive Circuits. Resistances in Series and Parallel. Network Analysis by Using Series and Parallel Equivalents. Voltage-Divider and Current-Divider Circuits. Node-Voltage Analysis. Mesh-Current Analysis. Thevenin and Norton Equivalent Circuits. Superposition Principle. Wheatstone Bridge. 3. Inductance and Capacitance. Capacitance. Capacitances in Series and Parallel. Physical Characteristics of Capacitors. Inductance. Inductances in Series and Parallel. Practical Inductors. Mutual Inductance. 4. Transients. First-Order RC Circuits. DC Steady State. RL Circuits. RC and RL Circuits with General Sources. Second-Order Circuits. 5. Steady-State Sinusoidal Analysis. Sinusoidal Currents and Voltages. Phasors. Complex Impedances. Circuit Analysis with Phasors and Complex Impedances. Power in AC Circuits. Thevenin and Norton Equivalent Circuits. Balanced Three-Phase Circuits. 6. Frequency Response, Bode Plots, and Resonance. Fourier Analysis, Filters, and Transfer Functions. First-Order Lowpass Filters. Decibels, the Cascade Connection, and Logarithmic Frequency Scales. Bode Plots. First-Order Highpass Filters. Series Resonance. Parallel Resonance. Ideal and Second-Order Filters. Digital Signal Processing. II. DIGITAL SYSTEMS. 7. Logic Circuits. Basic Logic Circuit Concepts. Representation of Numerical Data in Binary Form. Combinatorial Logic Circuits. Synthesis of Logic Circuits. Minimization of Logic Circuits. Sequential Logic Circuits. 8. Microcomputers. Computer Organization. Memory Types. Digital Process Control. The Motorola 68HC11/12. The Instruction Set and Addressing Modes for the 68HC11. Assembly-Language Programming. 9. Computer-Based Instrumentation Systems. Measurement Concepts and Sensors. Signal Conditioning. Analog-to-Digital Conversion. LabVIEWaA A . III. ELECTRONICS. 10. Diodes. Basic Diode Concepts. Load-Line Analysis of Diode Circuits. Zener-Diode Voltage-Regulator Circuits. Ideal-Diode Model. Piecewise-Linear Diode Models. Rectifier Circuits. Wave-Shaping Circuits. Linear Small-Signal Equivalent Circuits. 11. Amplifiers: Specifications and External Characteristics. Basic Amplifier Concepts. Cascaded Amplifiers. Power Supplies and Efficiency. Additional Amplifier Models. Importance of Amplifier Impedances in Various Applications. Ideal Amplifiers. Frequency Response. Linear Waveform Distortion. Pulse Response. Transfer Characteristic and Nonlinear Distortion. Differential Amplifiers. Offset Voltage, Bias Current, and Offset Current. 12. Field-Effect Transistors. NMOS and PMOS Transistors. Load-Line Analysis of a Simple NMOS Amplifier. Bias Circuits. Small-Signal Equivalent Circuits. Common-Source Amplifiers. Source Followers. CMOS Logic Gates. 13. Bipolar Junction Transistors. Current and Voltage Relationships. Common-Emitter Characteristics. Load-Line Analysis of a Common-Emitter Amplifier. pnp Bipolar Junction Transistor. Large-Signal DC Circuit Models. Large-Signal DC Analysis of BJT Circuits. Small-Signal Equivalent Circuits. Common-Emitter Amplifiers. Emitter-Followers. 14. Operational Amplifiers. Ideal Operational Amplifiers. Summing-Point Constraint. Inverting Amplifiers. Noninverting Amplifiers. Design of Simple Amplifiers. Op-Amp Imperfections in the Linear Range of Operation. Nonlinear Limitations. DC Imperfections. Differential and Instrumentation Amplifiers. Integrators and Differentiators. Active Filters. IV. ELECTROMECHANICS. 15. Magnetic Circuits and Transformers. Magnetic Fields. Magnetic Circuits. Inductance and Mutual Inductance. Magnetic Materials. Ideal Transformers. Real Transformers. 16. DC Machines. Overview of Motors. Principles of DC Machines. Rotating DC Machines. Shunt-Connected and Separately Excited DC Motors. Series-Connected DC Motors. Speed Control of DC Motors. 17. AC Machines. Three-Phase Induction Motors. Equivalent Circuit and Performance Calculations for Induction Motors. Synchronous Machines. Single-Phase Motors. Stepper Motors. Appendix A: Complex Numbers. Appendix B: Nominal Values and the Color Code for Resistors. Appendix C: Preparing for the Fundamentals of Engineering Exam. Appendix D: Computer-Aided Circuit Analysis. Index.

Applications of the current feedback operational amplifiers

Abstract: The current feedback operational amplifiers (CFOAs) are receiving increasing attention as basic building blocks in analog circuit design. This paper gives an overview of the applications of the CFOAs, in particular several new circuits employing the CFOA as the active element are given. These circuits include differential voltage amplifiers, differential integrators, nonideal and ideal inductors, frequency dependent negative resistors and filters. The advantages of using the CFOAs in realizing low sensitivity universal filters with grounded elements will be demonstrated by several new circuits suitable for VLSI implementation. PSPICE simulations using the AD844-CFOA which indicate the frequency limitations of some of the proposed circuits are included.

Oscillation-test strategy for analog and mixed-signal integrated circuits

Abstract: A new low-cost test method for analog integrated circuits, called oscillation-test, is presented. During the test mode, the circuit under test (CUT) is converted to a circuit that oscillates. Faults in the CUT which cause a reasonable deviation of the oscillation frequency from its nominal value can be detected. Using this test method, no test vector is required to be applied. Therefore, the test vector generation problem is eliminated and the test time is very small because a limited number of oscillation frequencies is evaluated for each CUT. Due to its digital nature, the oscillation frequency can be easily interfaced to boundary scan. This characteristics imply that oscillation-test strategy is very attractive for wafer-probe testing as well as final production testing. In this paper, the validity of the proposed test method has been verified throughout some examples such as operational amplifiers and analog-to-digital converter (ADC).

High-frequency amplifier, transmitting device and receiving device

Abstract: A radio frequency amplifier, for amplifying a radio frequency signal, comprises a plurality of active element groups, each comprising one or more active elements for amplifying a signal, with input terminals of said one or more active elements being combined to form a single input terminal and output terminals of said one or more active elements being combined to form a single output terminal and bias control means for controlling bias conditions of said plurality of active element groups arranged in such a manner that at low power output deterioration of the gain and distortion characteristics of the amplifier is avoided and sufficiently low power consumption can be achieved by switching the bias voltages of each of the active element groups of the high-frequency amplifier individually between an operating voltage and an off voltage.

Feedback loop for reading threshold voltage

Abstract: To read the threshold voltage of a transistor such as a floating gate transistor in an analog or multi-level memory cell, the transistor is connected in a feedback loop which contains a differential amplifier having an output terminal and an input terminal respectively connected to the gate and a node (source or drain) of the transistor. A reference voltage is asserted to a second input terminal of the differential amplifier. A load provides a current which charges the node, and the differential amplifier adjusts the gate voltage of the memory cell to an equilibrium value where current through the transistor is equal to current through the reference cell. The equilibrium value of the gate voltage depends on and indicates the threshold voltage of the transistor. In one embodiment of the invention, the load is a current source which mirrors a current through a reference cell that is structurally identical to the transistor, and the drain of the reference cell provides the reference voltage to the amplifier.

Class DE high-efficiency tuned power amplifier

Abstract: A new type of high-frequency high-efficiency tuned power amplifier is proposed, analyzed and verified experimentally. It is called a Class DE tuned power amplifier because its circuit topology is very similar to that of the conventional Class D amplifier and the operation of each switch satisfies the Class E switching conditions when the switch turns on. Class E switching conditions are achieved by providing a shunt capacitor for each switch and realizing a dead-time between the switch-on-times. These conditions take into account that the amplifier operates at higher frequency than the conventional Class D amplifier. The switch voltage stress has kept on the same level to the conventional Class D amplifier. The measured efficiency was over 96% at 1 MHz.

Multiple-band amplifier

Abstract: A GaAs MMIC dual-band amplifier for wireless communications is disclosed for operation at either the 800 MHz or the 1900 MHz band and it provides desired gain and input and output impedance. Switching impedance networks are used at the input and output of the amplifier to provide matching input impedance and desired output impedance for operation in the two bands. Switching impedance networks are also used between any successive stages of the amplifier to provide proper interstage impedance. The dual band amplifier includes a bias control circuit which biases the amplifier to operate in A, B, AB or C mode. The amplifier can be used for the AMPS 800 or the GSM 900 operation or any other cellular operation such as the PCS 1900 and the it can be switched between the two operations by simply applying a proper control signal to the amplifier.

capacitive sensor interface circuit

Abstract: In a switched-capacitor type interface circuit connected to a capacitive sensor having two capacitors (C1, C2) whose value is variable, the interface circuit includes an operational amplifier (A1) with an output terminal and an inverting input terminal between which a feedback/sampling capacitor (C3) is connected, and a holding capacitor (C4) connected between the operational amplifier (A1) and a reference voltage source. The capacitors (C1, C2, C3) have one ends connected to the inverting input terminal of the operational amplifier (A1). The other ends of the capacitors (C1, C2) are connected to a power source and the capacitor (C3) is concurrently short-circuited depending upon predetermined timing, and the other ends of the and capacitors (C1, C2) and the output terminal of the operational amplifier (A1) are respectively connected to a non-inverting input terminal of the operational amplifier (A1) after the elapse of a predetermined time from the predetermined timing.

Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage

Abstract: New bias circuits which provide currents to n- and p-channel differential pairs placed in parallel are introduced. The bias currents are a function of the input common mode voltage in such a way that the total transconductance, g/sub mT/, of the differential pairs is constant over the entire common mode range. The bias circuits, together with the differential pairs, are used to design input stages of low-voltage (/spl les/3.3 V) complementary metal-oxide-semiconductor (CMOS) operational amplifiers (op amps). The new circuits are robust in that they do not require transconductance parameter matching of n- and p-channel transistors for proper operation. A simple rail-to-rail common source output stage with class AB control is also developed and used in the design of two-stage op amps. Experimental results of MOSIS test chips containing a family of low-voltage op amps fabricated in 2 /spl mu/m p-well process are provided. The results demonstrate the effectiveness and robustness of the proposed constant transconductance input stages in achieving constant opamp unity gain frequency with very low levels of total harmonic distortion (THD) and with 3.3 V and 2.5 V power supply voltage.

Design of SOI CMOS operational amplifiers for applications up to 300/spl deg/C

Abstract: Design guidelines using two analog parameters (Early voltage and transconductance to drain current ratio) are proposed for correct operation of silicon-on-insulator (SOI) CMOS operational amplifiers (opamp) at elevated temperature up to 300/spl deg/C The dependence of these parameters on temperature is first described A new single-stage CMOS opamp model using only these two parameters is presented and compared to measurements of several implementations operating up to 300/spl deg/C for applications such as micropower (below 4 /spl mu/W at 12 V supply voltage), high gain (65 dB) or high frequency up to 100 MHz Trade-offs among such factors as gain, bandwidth, phase margin, signal swing, noise, matching, slew rate and power consumption are described The extension to other architectures is suggested and the design methodology is valid for bulk as well as SOI CMOS opamps

Current-mode biquad without external passive elements

Abstract: A novel current-mode biquad using only operational amplifiers (OAs) and multiple current output operational transconductance amplifiers (OTAs) is introduced. The proposed circuit can realise five different biquad transfer functions simultaneously. This circuit enables the circuit characteristics to be electronically tuned. An example is given, together with simulated results by PSPICE.

Precision digital pulse phase generator

Abstract: A timing generator (10) comprises a crystal oscillator (12) connected to provide an output reference pulse. A resistor-capacitor combination is connected to provide a variable-delay output pulse (18) from an input connected to the crystal oscillator (12). A phase monitor is connected to provide duty-cycle representations of the reference and variable-delay output pulse phase. An operational amplifier drives a control voltage to the resistor-capacitor combination according to currents integrated from the phase monitor and injected into summing junctions. A digital-to-analog converter (34) injects a control current into the summing junctions according to an input digital control code. A servo equilibrium results that provides a phase delay of the variable-delay output pulse to the output reference pulse that linearly depends on the input digital control code.

Biquadratic switched-capacitor filter using single operational amplifier

Abstract: The present invention discloses a biquadratic switched-capacitor filter, which merely utilizes one operational amplifier to implement a biquadratic transfer function. The biquadratic switched-capacitor filter further comprises ten switched-capacitor circuits, two feedback capacitors, and two individual switching devices. The switching devices in this switched-capacitor filter can be controlled by six different clock signals. The first and second clock signals are two-phase, complementary but non-overlapping pulse trains with a reference period. The third clock signal is a pulse train with double the reference period and coincident with the first clock signal. The fourth, the fifth, and the sixth clock signals are pulse trains that result from delaying the third, the fourth, and the fifth clock signals by half the reference period. The obtained switched-capacitor filter can be used to simplify some applications, such as sigma-delta modulators.

Challenges in analog IC design submicron CMOS technologies

Abstract: In submicron CMOS devices, short-channel effects lead to shifts in threshold voltage, increased mismatch and noise. The velocity saturation limits the obtainable transconductance and hence also the high-speed performance. Lower supply voltages require the operational amplifier building block to operate rail-to-rail. In delta-sigma converters this leads to very-low-power converters. Considerable attention is given to circuit design for telecommunication applications, in which the inductor is making a comeback. The ultimate challenge-of analog design however is the cointegration with digital blocks, causing coupling noise and requiring sophisticated tools.

Control of circuit distortion by the derivative superposition method [MMIC amplifier]

Abstract: The derivative structure of the characteristics of GaAs FET's naturally gives rise to changes in magnitude and reversals of phase of intermodulation distortion components. An MMIC design method that exploits the phase reversal to achieve control of distortion in an amplifier is presented. An example circuit is designed and its measured performance is compared with that of a conventional amplifier.

Continuous time programmable analog block architecture

Abstract: A programmable analog circuit apparatus receives a differential analog input signal and provides a processed differential analog output signal. The programmable analog circuit apparatus includes a first input transconductor, a differential amplifier, and a feedback transconductor. The first input transconductor has a programmable transconductance and includes an input transconductor positive input terminal and an input transconductor negative input terminal and an input transconductor positive output terminal and an input transconductor negative output terminal. The positive and negative input terminals are coupled to receive the differential analog input signal. The differential amplifier includes first and second amplifier input terminals and first and second amplifier output terminals. The positive and negative input transconductor output terminals are coupled to the first and second differential amplifier input terminals. The amplifier output terminals are coupled to the first and second amplifier input terminals. The amplifier provides the processed differential analog output signal via the amplifier output terminals. The feedback transconductor includes a positive feedback transconductor input terminal and a negative feedback transconductor input terminal and a positive feedback transconductor output terminal and a negative feedback transconductor output terminal. The positive and negative feedback transconductor input terminals are coupled to the first and second amplifier output terminals and the positive and negative feedback transconductor output terminals are coupled to the first and second amplifier input terminals. The feedback transconductor output terminals has a high output impedance.

Microelectronics: An Integrated Approach

Abstract: 1. Introduction to Microelectronics. Introduction. The Digital Inverter. Microelectronic Sensing Systems. Memories. 2. Semiconductor Physics and IC Technology. Pure Semiconductors. Generation, Recombination, and Thermal Equilibrium. Doping. Carrier Transport. Silicon Integrated Circuit Technology. C Resistors. 3. pn Junction and MOS Electrostatics. Applied Electrostatics. Carrier Concentration and Potential in Thermal Equilibrium. The PN Junction in Thermal Equilibrium. The PN Junction Under Reverse Bias. Depletion Capacitance. The MOS Capacitor: A First Pass. The Electrostatics of the MOS Capacitor. Capacitance of the MOS Structure. 4. The MOS Field-Effect Transistor. Introduction. Device Physics of MOSFET: Drain Current and Channel Charge. MOSFET Device Physics: A First Pass. MOSFET Device Physics: the Gradual Channel Approximation. MOSFET Circuit Models. Level I DC Model 35. 5. Digital Circuits Using Mos Transistors. Logic Concepts. Inverter Characteristics. MOS Inverter Circuits. CMOS Inverter Analysis. Static CMOS Logic Gates. Dynamic Logic. Pass Transistor Logic. 6. The pn Junction Diode. pn Diode Circuit Symbol and Terminal Characteristics. Integrated Circuit pn Diodes. The pn Junction Diode: A First Pass. pn Junction Diode Circuit Models. SPICE Model of the pn Junction Diode. Device Physics of the pn Junction Diode: Non-Equilibrium Minority Carrier Recombination. The Continuity Equation. Minority Carrier Distributions and Current Components: A Second Pass. Diode Applications. 7. The Bipolar Junction Transistor. Introduction. Bipolar Junction Transistor Physics: A First Pass. Reverse Active and Saturation Operating Regions. The Ebers-Moll Equations. Small-Signal Model of the npn BJT. BJT Device Physics. Lateral pnp Bipolar Transistor. SPICE Models for Bipolar Junction Transistors. 8. Single-State Bipolar/MOS Transistor Amplifiers. General Amplifier Concepts. Common-Emitter Amplifier-Introduction. Common-Source Amplifier-Introduction. Current Source Supplies. Common-Source Amplifier with Current Source Supply. Common-Emitter Amplifier with Current Source Supply. Improved Transconductance Amplifier with Emitter Degeneracy Resistor. Common-Base/Gate Amplifier. 9. Multistage Amplifiers. MOS Multistage Amplifiers-Small Signal Description. BiCMOS Multistage Amplifiers-Small Signal Description. BiCMOS Multistage Amplifiers-Small Signal Description. Direct-coupled Amplifiers-Large Signal Analysis. DC Voltage and Current Sources. A Two-Stage Transconductance Amplifier. Analysis of a BiCMOS Voltage Amplifier. Exercise and Problems. 10. Frequency Response. Bode Plots. Device Models for Frequency Response Analysis. Short-Circuit Current Gain. Voltage Gain Amplifiers. Frequency Response of Common-Collector/Drain Voltage Buffer. Common-Base/Gate Amplifier-Current Buffer. Frequency Response of Multistage Amplifiers. 11. Differential Amplifiers. General Concepts for Differential Amplifiers. Small Signal Analysis of Differential Amplifiers. Two-Port Model for the Differential Amplifier. Frequency Response of Differential Amplifiers. Differential Amplifiers with Single-Ended Outputs. Large Signal Analysis of Differential Amplifiers. Exercises and Problems. 12. Feedback and Operational Amplifiers. Introduction: Amplifier Models and the Feedback Concept. Frequency Response of Feedback Amplifiers. Large-Signal Benefits of Feedback. Practical Feedback Amplifiers. Integrated Operational Amplifiers. BiCOMS Operational Amplifiers. 13. MOS Memories. Memory Classification. MOS Memory Architecture. Memory Cells. Sense Amplifiers. Address Decoders and Buffers. SRAM Design Example. Exercises and Problems.

Silicon carbide MOSFET technology

Abstract: The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the world's first SiC analog IC—a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included: characterization of the SiCSiO2 interface using thermally grown oxides; high temperature (350°C) reliability studies of thermally grown oxides; ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes; epitaxial layer characterization; device isolation methods; and finally integrated circuit design, fabrication and testing of the world's first monolithic SiC operational amplifier IC. High temperature circuit drift instabilities at 350°C were characterized. These studies defined an SiC depletion model MOSFET IC technology and outlined tasks required to improve all types of SiC devices.

Stable low dropout voltage regulator controller

Abstract: A single-loop voltage regulator controller includes a high-gain transconductance amplifier that accommodates common mode inputs as low as its negative supply rail. The input stage of the amplifier produces a proportional to absoulte temperature (PTAT) input offset voltage. The transconductance amplifier's inverting input is connected to the circuit common, or negative supply rail, and a tap from a feedback network is connected to the amplifier's noninverting input. The feedback network provides, at this tap, a PTAT measure of the regulator's regulated output. The amplifier's output is connected to drive a noninverting driver which, in turn, is connected to drive the control terminal of the regulator's pass transistor. A compensation capacitor connected between the amplifier's output and the regulated output terminal ensures the regulator's stability even for relatively low level load impedances.

Field effect transistor cable television line amplifier

Abstract: An amplifier circuit for a cable access television line amplifier includes a first cascode amplifier (Q1, Q3) and a second cascode amplifier (Q2, Q4) coupled in a push-pull arrangement. An alternative amplifier circuit includes a first transimpedance amplifier (Q1) and a second transimpedance amplifier (Q2) coupled in a push-pull arrangement. The first transimpedance amplifier further includes a field effect transistor (Q3) as an active load so as to provide feedback and the second transimpedance amplifier further includes a field effect transistor (Q4) as an active load so as to provide feedback.

Circuit and method for performing tests on memory array cells using external sense amplifier reference current

Abstract: An integrated memory circuit (chip) and methods for testing the chip. The chip has an array of memory cells, a sense amplifier for reading selected ones of the cells, and a switch having a first state allowing an external device connected to an external pad to sink a reference current from the sense amplifier and a second state disconnecting the pad from the sense amplifier (so that an internally generated reference current can be supplied to the sense amplifier with the switch in the second state). In the first state, the switch preferably is tolerant of a broad and continuous range of voltages on the pad. In some test modes, cells are read using a sense amplifier of the chip while selected voltages are applied to each cell and external equipment sinks reference current flowing from the sense amplifier through an external pad, thus sensing data from each cell with all the timing constraints usually placed on a read of the cell in the normal mode. In one test mode, all wordlines of the array are disabled and a read cycle is performed to measure all columns of the array sequentially while an external reference current flows between external test equipment and a sense amplifier used for performing the read cycle, and the sense amplifier output indicates whether one or more of the columns has leaky cells.

Floating capacitative measuring bridge.

Abstract: The bridge has a capacitative sensor (C) comprising a measuring electrode (15), a guard electrode (17) and an earthed electrode (16). An operational amplifier (3) has it's first input (-) connected to the measuring electrode (15), the second to the guard electrode (17) and has a counter reaction capacitor (6) connected between the first input and the output. Means (4) are provided to process the operational amplifier output and also (100) to supply it relative to the floating guard electrode potential. A total screen (2) encloses the operational amplifier (3), the counter reaction capacitor (6) and an excitation capacitor (7).

Novel single-resistance-controlled-oscillator configuration using current feedback amplifiers

Abstract: A novel configuration is presented which can realize single-resistance controlled active-RC and active-R oscillators and low-pass/band-pass filters from the same structure.

Even harmonic resonant class E tuned power amplifier without RF choke

Abstract: A method for designing an amplifier that does not need an RF choke coil is proposed. This is accomplished by adding a shunt capacitor to a class E amplifier with a shunt inductor; this creates class E switching where higher harmonics are induced in the inductor-fed input waveform. A design method is derived by performing an analysis of the circuit assuming load current is sinusoidal. Because the switch current is smaller than that of conventional class E amplifiers (with the same output power), the losses due to the series saturation resistance of the switch device are greatly reduced for the proposed amplifier. A 96-percent RF conversion efficiency for 2 W of output power was obtained in experiments using a 2-MHz switch using the proposed design.

A theoretical study of the stability of high frequency current feedback op-amp integrators

Abstract: In this paper, we present a comprehensive theoretical study of the stability of current feedback op-amps, when used with both resistive and capacitive feedback The paper identifies some of the more subtle features of designing with current feedback op-amps, and the impact these features have on the amplifiers stability There is a common misconception that the current feedback op-amp will oscillate when connected as a classical active R-C integrator; in this paper we prove that this is not necessarily the case and theoretically demonstrate that under certain design conditions the current feedback op-amp has in fact enormous potential for high frequency integrator design Theoretical analysis is confirmed by both simulation and measured results using commercially available current feedback op-amps, and comparisons are made with classical voltage-mode op-amps

Analog amplifiers: classification and generalization

Abstract: Amplifiers with high open-loop gain (operational amplifiers) are frequently encountered in analog signal processing circuits, since the application of negative feedback enables numerous transfer functions to be implemented. The designer wanting to select an operational amplifier for a given application is met with a vast range of devices, with different architectures optimized for particular system requirements. This range seems to be ever expanding, with "novel" amplifier topologies offering enhanced performance over more conventional devices. This paper presents an overview of amplifier theory, and shows that many novel amplifier architectures are simply implementations of earlier theories which have been made possible by advances in process technology. The analysis also shows that many ideas such as fixed gain bandwidth product are not inherent to negative feedback amplifier circuits, but result from the choice of amplifier architecture within a particular application.