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Showing papers on "RC circuit published in 2013"


Journal ArticleDOI
TL;DR: Both differential and single-ended N-path notch filters are modeled and analyzed and closed-form equations provide design equations for the main filtering characteristics and nonidealities such as: harmonic mixing, switch resistance, mismatch and phase imbalance, clock rise and fall times, noise, and insertion loss.
Abstract: N-path switched-RC circuits can realize filters with very high linearity and compression point while they are tunable by a clock frequency. In this paper, both differential and single-ended N-path notch filters are modeled and analyzed. Closed-form equations provide design equations for the main filtering characteristics and nonidealities such as: harmonic mixing, switch resistance, mismatch and phase imbalance, clock rise and fall times, noise, and insertion loss. Both an eight-path single-ended and differential notch filter are implemented in 65-nm CMOS technology. The notch center frequency, which is determined by the switching frequency, is tunable from 0.1 to 1.2 GHz. In a 50-Ω environment, the N-path filters provide power matching in the passband with an insertion loss of 1.4-2.8 dB. The rejection at the notch frequency is 21-24 dB, P1 dB > +2 dBm, and IIP3 > +17 dBm.

127 citations


Journal ArticleDOI
TL;DR: In this paper, the authors address the energy efficiency issue of switched-capacitor converters by dividing the analysis of the entire efficiency problem into two parts, and propose some design rules useful for developing high-efficiency switch-capACC converters.
Abstract: The energy-efficiency issue of switched-capacitor converters is still a controversial topic that requires a more in-depth discussion. In this paper, we address the issue by dividing the analysis of the entire efficiency problem into two parts. In the first part, the efficiency of a capacitor-charging RC circuit under different aspects (partial charging, full charging, at zero capacitor voltage, at nonzero capacitor voltage, etc.) will be conducted. The efficiency analysis of a capacitor-discharging RC circuit with a resistor, capacitor, and paralleled resistor-capacitor loads will be covered. A complete evaluation of the overall efficiency is then performed in terms of both the charging and discharging efficiencies. Based on the analysis, some design rules useful for developing high-efficiency switched-capacitor converters is suggested. Additionally, it is shown that the belief that quasi-switched-capacitor converters are more lossy than switched-capacitor converters is a common misconception.

109 citations


Journal ArticleDOI
TL;DR: In this article, an equivalent electrical circuit model for a unit cell all-vanadium redox flow battery (V-RFB) is presented, which consists of an open-circuit cell potential (Ecell(ORP)) which is in series with an ohmic internal resistance and parallel with an n-Resistor-Capacitor (n-RC) network.

97 citations


Journal ArticleDOI
TL;DR: The proposed analysis can be used to model charge migration in amorphous materials, which may be associated to specific macroscopic or microscopic scale fractal geometrical structures in composites displaying a viscoelastic electromechanical response, as well as to model the collective responses of processes governed by random events described using statistical mechanics.
Abstract: An incidence matrix analysis is used to model a three-dimensional network consisting of resistive and capacitive elements distributed across several interconnected layers. A systematic methodology for deriving a descriptor representation of the network with random allocation of the resistors and capacitors is proposed. Using a transformation of the descriptor representation into standard state-space form, amplitude and phase admittance responses of three-dimensional random RC networks are obtained. Such networks display an emergent behavior with a characteristic Jonscher-like response over a wide range of frequencies. A model approximation study of these networks is performed to infer the admittance response using integral and fractional order models. It was found that a fractional order model with only seven parameters can accurately describe the responses of networks composed of more than 70 nodes and 200 branches with 100 resistors and 100 capacitors. The proposed analysis can be used to model charge migration in amorphous materials, which may be associated to specific macroscopic or microscopic scale fractal geometrical structures in composites displaying a viscoelastic electromechanical response, as well as to model the collective responses of processes governed by random events described using statistical mechanics.

93 citations


Journal ArticleDOI
TL;DR: The fabrication of Resistor-Capacitor filters and field effect transistors (FETs) based on pencil drawings on paper, which contain turbostratic graphite crystallites as evidenced from Raman analysis, is reported, truly remarkable given the simplicity of the fabrication process.
Abstract: We report the fabrication of Resistor-Capacitor (RC) filters and field effect transistors (FETs) based on pencil drawings on paper, which contain turbostratic graphite crystallites as evidenced from Raman analysis. Pencil drawings have been employed as resistor and an ion gel, 1-butyl-3-methylimidazolium octyl sulfate mixed with polydimethylsiloxane (PDMS) as dielectric, for the fabrication of RC filters with a cut-off frequency of 9 kHz. With ion gel as gate dielectric, an ambipolar electric field effect has been obtained from the pencil-trace at low operating voltages. The carrier mobilities were found to be ∼106 and 59 cm(2) V(-1) s(-1) for holes and electrons, respectively. The mobility value showed only 15% variation among the devices tested, truly remarkable given the simplicity of the fabrication process.

87 citations


Journal ArticleDOI
Le Ye1, Congyin Shi1, Huailin Liao1, Ru Huang1, Yangyuan Wang1 
TL;DR: A generic-purpose solution of highly power-efficient active-RC filters, suitable for analog baseband with wide bandwidth-range from several mega- Hz to hundreds of mega-Hz in wireless receivers, and the GBW compensation and the Q-degrading scheme are adopted to relax the opamp GBW requirement, further reducing the power dissipation.
Abstract: This paper presents a generic-purpose solution of highly power-efficient active-RC filters, which is suitable for analog baseband with wide bandwidth-range from several mega-Hz to hundreds of mega-Hz in wireless receivers. A 260 μA 7-20 MHz 6th-order active-RC low-bandwidth low-pass filter (LBW-LPF) and a 2.3 mA 240-500 MHz 6th-order active-RC high-bandwidth low-pass filter (HBW-LPF) are implemented in a standard 0.18 μm CMOS process to demonstrate this versatile solution. Highly power-efficient push-pull opamps with 30-to-35 dB gain are adopted for the filters, which allow us to focus on extending the bandwidth and reducing the power consumption. The push-pull opamp with adaptive-biased and pole-cancellation push-pull source follower (APP-SF) as the buffer stage is proposed to greatly reduce the power consumption and effectively extend the bandwidth. An adaptive bias mechanism is also proposed to tolerate the PVT variations for the opamps. In addition, the GBW compensation and the Q-degrading scheme are adopted to relax the opamp GBW requirement, further reducing the power dissipation. The LBW-LPF only consumes 260 μA current from 1.8 V supply, achieves 14.4 dBm in-band IIP3 and 66.2 nV/√ Hz IRN density, and occupies 0.21 mm 2 silicon area without pads. The HBW-LPF merely dissipates 2.3 mA current from 1.8 V supply, achieves 11.3 dBm in-band IIP3 and 13.1 nV/√ Hz IRN density, and occupies 0.23 mm 2 silicon area without pads.

71 citations


Journal ArticleDOI
TL;DR: The analysis of the two series memristors is introduced to study the effect of changing their polarities, as well as the mobility factor to be used in the two-gate relaxation oscillator instead of the RC circuit.
Abstract: Memristive oscillators are a novel topic in nonlinear circuit theory, where the behavior of the reactive elements is emulated by the memristor. This paper presents symmetric and asymmetric memristive two-gate relaxation oscillators. First, the analysis of the two series memristors is introduced to study the effect of changing their polarities, as well as the mobility factor to be used in the two-gate relaxation oscillator instead of the RC circuit. The generalized analysis for the proposed memristive two-gate oscillator is introduced, where the generalized expressions for the oscillation frequency and conditions for oscillation are derived then four special cases for different mismatching of the memristors are introduced; showing a perfect matching with the PSPICE simulations. Finally, the discussion and comparison are proposed to discuss the four special cases and MATLAB simulations are also provided to study the effect of the memristance and the mobility ratio between the memristors on the oscillation frequency.

53 citations


Journal ArticleDOI
TL;DR: This work combines a generalized intrinsic plasticity rule with a local information dynamics based schema of reservoir neuron leak adaptation to allow the RC network to be optimized in a self-adaptive manner with minimal parameter tuning.
Abstract: Recurrent neural networks of the reservoir computing (RC) type have been found useful in various time-series processing tasks with inherent non-linearity and requirements of variable temporal memory. Specifically for delayed response tasks involving the transient memorization of information (temporal memory), self-adaptation in RC is crucial for generalization to varying delays. In this work using information theory, we combine a generalized intrinsic plasticity rule with a local information dynamics based schema of reservoir neuron leak adaptation. This allows the RC network to be optimized in a self-adaptive manner with minimal parameter tuning. Local active information storage, measured as the degree of influence of previous activity on the next time step activity of a neuron, is used to modify its leak-rate. This results in RC network with non-uniform leak rate which depends on the time scales of the incoming input. Intrinsic plasticity (IP) is aimed at maximizing the mutual information between each neuron’s input and output while maintaining a mean level of activity (homeostasis). Experimental results on two standard benchmark tasks confirm the extended performance of this system as compared to the static RC (fixed leak and no IP) and RC with only IP. In addition, using both a simulated wheeled robot and a more complex physical hexapod robot, we demonstrate the ability of the system to achieve long temporal memory for solving a basic T-shaped maze navigation task with varying delay time scale.

44 citations


Proceedings ArticleDOI
28 Oct 2013
TL;DR: In this paper, a thermal network with temperature dependent thermal conductivities and heat capacitances is used to calculate the junction temperature of IGBT in a device model realized in Simulink.
Abstract: A RC thermal network with temperature dependent thermal conductivities and heat capacitances is used to calculate the junction temperature of IGBT in a device model realized in Simulink. The collector current, IC, collector-emitter voltage, VCE, and the case temperature, TC, measured during the cycling, are used as input parameters of the Simulink model. The model is compared with a constant thermal conductivity and heat capacitance model (RC network) and verified experimentally using a thermo-sensitive electrical parameter method. Including the temperature dependent parameters results in an improvement of accuracy for determining the junction temperature compare to the model with constant thermal conductivity and heat capacitance.

42 citations


Journal ArticleDOI
TL;DR: In this article, the Laplace transform of the fractional derivative in the Caputo sense is used to analyze a RC electrical circuit described by a fractional differential equation of the order 0 < α≤ 1.
Abstract: This paper provides an analysis in the time and frequency domain of an RC electrical circuit described by a fractional differential equation of the order 0 < α≤ 1. We use the Laplace transform of the fractional derivative in the Caputo sense. In the time domain we emphasize on the delay, rise and settling times, while in the frequency domain the interest is in the cutoff frequency, the bandwidth and the asymptotes in low and high frequencies. All these quantities depend on the order of differential equation.

39 citations


Journal ArticleDOI
TL;DR: In this paper, a novel inductance-free nonlinear oscillator circuit with a single bifurcation parameter is presented, which is composed of a twin-T oscillator, a passive RC network, and a flux-controlled memristor.
Abstract: A novel inductance-free nonlinear oscillator circuit with a single bifurcation parameter is presented in this paper. This circuit is composed of a twin-T oscillator, a passive RC network, and a flux-controlled memristor. With an increase in the control parameter, the circuit exhibits complicated chaotic behaviors from double periodicity. The dynamic properties of the circuit are demonstrated by means of equilibrium stability, Lyapunov exponent spectra, and bifurcation diagrams. In order to confirm the occurrence of chaotic behavior in the circuit, an analog realization of the piecewise-linear flux-controlled memristor is proposed, and Pspice simulation is conducted on the resulting circuit.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed the THz SPICE model for simulating field effect transistors (FETs) in a plasmonic mode of operation at frequencies far above the device cutoff frequency.
Abstract: The THz SPICE model is capable of simulating field effect transistors (FETs) in a plasmonic mode of operation at frequencies far above the device cutoff frequency. The model uses a distributed RC or RLC network and is validated by comparison of the simulation results with our analytical model of the plasmonic detector, and with measured results. It also allows us to determine the operation regimes, where conventional SPICE models are still applicable. The applicability of this model for THz sensing applications is demonstrated by simulating the plasmonic THz FET sensor with on-chip amplifier.

Journal ArticleDOI
TL;DR: In this paper, a three-branch RC equivalent circuit model is improved to predict the terminal voltage up to 5 to 10 min after completion of charging or discharging of a supercapacitor.
Abstract: The supercapacitor, because of its advantages of high specific power, quick charging or discharging with high current rates, and long cycle life, is an interesting choice for energy storage for applications where high power is needed for only a few seconds, such as pulse-power supply systems. Based on the use of supercapacitors all around the world, more and more attention is focused on the effects of temperature on their performance metrics such as capacitance, internal resistance, and efficiency. To predict the terminal voltage of supercapacitors at different temperatures, a three-branch RC equivalent circuit model is improved in this paper, and it can predict the terminal voltage up to 5 to 10 min after completion of charging or discharging. Initially, a typical three-branch RC equivalent circuit model without temperature parameter is used to simulate the pulse charging and discharging behavior of a specific commercial supercapacitor. Next, with the pulse charging and discharging experiment results under ${-}{\rm 40}^{\circ}{\rm C}$ , ${-}{\rm 20}^{\circ}{\rm C}$ , 0 $^{\circ}{\rm C}$ , and 20 $^{\circ}{\rm C}$ , all parameters in the circuit model are reset to a function of temperature, and the temperature dependence of parameters is discussed in detail and determined numerically. Finally, for the purpose of validating the correctness and the accuracy of the improved model, compared study of simulation results and experiment curves is done. Comparison results show that the fitting accuracy of the improved equivalent circuit model is satisfied in pulse charging and discharging at different temperature.

Proceedings ArticleDOI
28 Mar 2013
TL;DR: This work presents a fully integrated 57.9-to-68.3GHz frequency synthesizer, which employs an in-phase injection-coupled QVCO (IPIC-QVCO) to produce low-phase-noise quadrature signals with low power.
Abstract: Under the influence of increasing demand for high-data-rate communication systems such as 60GHz band applications, the requirements of PLLs keep getting higher. In a mm-Wave direct-conversion transceiver, the quadrature LO signal generation is challenging. The conventional techniques to generate quadrature LO signals suffer from many problems. The method of using a divide-by-2 divider after a VCO with double LO frequency is popular in multi-GHz designs, but it is difficult to be realized at mm-Wave frequencies. Employing passive RC complex filters is another way to generate quadrature signals, but high power is required to compensate its loss. The conventional parallel-coupled QVCO seems to be a good choice for mm-Wave application. However, the approach suffers from poor phase noise. This work presents a fully integrated 57.9-to-68.3GHz frequency synthesizer, which employs an in-phase injection-coupled QVCO (IPIC-QVCO) to produce low-phase-noise quadrature signals with low power.

Proceedings ArticleDOI
31 Oct 2013
TL;DR: A CMOS temperature sensor intended for the temperature compensation of MEMS frequency references is presented, based on a Wien bridge RC filter, whose phase-shift is due to the temperature dependency of the resistors used, is temperature dependent.
Abstract: This paper presents a CMOS temperature sensor intended for the temperature compensation of MEMS frequency references. It is based on a Wien bridge RC filter, whose phase-shift, due to the temperature dependency of the resistors used, is temperature dependent. This phase shift is then digitized by a phase domain sigma-delta modulator. The sensor was implemented in 0.18μm CMOS, consumes 36 μW and achieves 6mK resolution in a conversion time of 100msec. After batch calibration and a 3-point trim, it achieves ±0.15°C (3σ) inaccuracy over the industrial range (-40°C to 85°C).

Patent
26 Aug 2013
TL;DR: In this article, a power converter is used in the current control circuit and control method, consisting of a converter, a voltage divider circuit, a current sampling circuit, first gain circuit, differential amplifier, a second gain circuit and a multiplier, a saw tooth wave generator, a modulation comparator, and a driver.
Abstract: A power converter used in the current control circuit and control method, consisting of a converter, a voltage divider circuit, a current sampling circuit, a first gain circuit, a differential amplifier, a second gain circuit, a multiplier, a saw tooth wave generator, a modulation comparator, and a driver. The invention samples inductor current through the current sampling circuit and generates the current sense signal, then processes again. With the differential amplifier, it compares the feedback voltage from the voltage divider circuit with the reference voltage, and the results along a modulation comparator output a drive signal to control the duty cycle in order to avoid the generation of inrush current. The present invention avoids inrush current caused by the large drive signal and achieves a good response rate and better system stability.

Journal ArticleDOI
TL;DR: A reconfigurable low-noise amplifier based on a high-value active inductor (AI) with a wide tuning range is presented and results in a decrease in the physical silicon area when compared to a passive inductor-based implementation.
Abstract: A reconfigurable low-noise amplifier (LNA) based on a high-value active inductor (AI) is presented in this paper. Instead of using a passive on-chip inductor, a high-value on-chip inductor with a wide tuning range is used in this circuit and results in a decrease in the physical silicon area when compared to a passive inductor-based implementation. The LNA is a common source cascade amplifier with RC feedback. A tunable active inductor is used as the amplifier output load, and for input and output impedance matching, a source follower with an RC network is used to provide a 50 Ω impedance. The amplifier circuit has been designed in 0.18 µm CMOS process and simulated using the Cadence Spectra circuit simulator. The simulation results show a reconfigurable frequency from 0.8 to 2.5 GHz, and tuning of the frequency band is achieved by using a CMOS voltage controlled variable resistor. For a selected 1.5 GHz frequency band, simulation results show S 21 (Gain) of 22 dB, S 11 of −18 dB, S 22 of −16 dB, NF of 3.02 dB, and a minimum NF (NFmin) of 1.7 dB. Power dissipation is 19.6 mW using a 1.8 V dc power supply. The total LNA physical silicon area is (200×150) µm2.

Patent
16 Jul 2013
TL;DR: In this paper, a higher power wireless power transmitter (HPWPT) including a first, second and third circuit and a transmit coil for wirelessly powering a lower power wireless receiver (LPWPR) is provided.
Abstract: A higher power wireless power transmitter (HPWPT) including a first, second and third circuit and a transmit coil for wirelessly powering a lower power wireless power receiver (LPWPR) is provided. The first circuit is a switch network. The second circuit is variable impedance network and/or a tuning network. The third circuit is a control logic circuit configured to change the input voltage source or topology of the first circuit, to change the impedance and/or tuning characteristics of the second circuit, to select the transmit coil, vary frequency or duty cycle of the PWM signal or any combination thereof. The change in the input voltage or topology of first circuit or change in impedance or tuning characteristics of second circuit or change in the transmit coil used or the applied constraints on the frequency and duty cycle of the PWM signal constrain the maximum power transmitted by the HPWPT to LPWPR.

Proceedings ArticleDOI
28 Mar 2013
TL;DR: A discrete-time (DT) analog signal processing approach appears to answer the requirements of portable wireless communication devices, which demand nowadays ever decreasing power consumption, and more tunability/reprogrammability.
Abstract: Filters are key building blocks in wireless communication and analog signal processing Typically, Gm-C and active-RC topologies are being used for this purpose However, reduced supply voltage and lower transistor output impedance make it difficult to implement high-gain wide-bandwidth opamps in a power-efficient manner Moreover, portable wireless communication devices demand nowadays ever decreasing power consumption, and more tunability/reprogrammability A discrete-time (DT) analog signal processing approach appears to answer these requirements

Proceedings ArticleDOI
Shan Yin1, Tao Wang1, King Jet Tseng1, Jiyun Zhao1, Xiaolei Hu1 
01 Nov 2013
TL;DR: The behavior-based electro-thermal models for commercial SiC Schottky diode and SiC MOSFET have been developed for circuit simulator PSpice over a wide range of temperature.
Abstract: The behavior-based electro-thermal models for commercial SiC Schottky diode and SiC MOSFET have been developed for circuit simulator PSpice over a wide range of temperature. The Foster RC network is used for thermal modeling and coupled with the electrical modeling by the interaction between power loss and junction temperature. Based on the measurement and parameters extracted from datasheet, both static and dynamic models are formulated by curve fitting. Some simplifications are introduced during modeling to improve convergence and simulation speed. An all-SiC boost converter is also analyzed by simulation to evaluate the models.

Patent
18 Dec 2013
TL;DR: In this article, a response signal is provided from a communications module to a handheld computing device comprising a reader system once the capacitor reaches a predetermined threshold voltage, which is determined using a processor.
Abstract: A method of remote sensing a charge includes charging or discharging a capacitor of an RC circuit to a predetermined threshold voltage using a power source. A response signal is provided from a communications module to a handheld computing device comprising a reader system once the capacitor reaches the predetermined threshold voltage. An amount of time taken for the handheld computing device to receive the response signal is determined using a processor. The processor determines charge information using the amount of time.

Patent
13 Nov 2013
TL;DR: In this article, the authors proposed a circuit for generating a clock signal in an implantable medical device using an application specific integrated circuit (ASIIC) with no external components, including a regulator that produces a power supply for the timer circuitry from a main power supply (Vcc), with a frequency independent of temperature and Vcc fluctuations.
Abstract: Timer circuitry completely formable in an integrated circuit (IC) for generating a clock signal in an implantable medical device is disclosed. The timer circuitry can be formed on the same Application Specific Integrated Circuit typically used in the implant, and requires no external components. The timer circuitry comprises modification to a traditional astable timer circuit. A resistance in the disclosed timer circuit can be trimmed to adjust the frequency of the clock signal produced, thus allowing that frequency to be set to a precise value during manufacturing. Precision components are not needed in the RC circuit, which instead are used to set the rough value of the frequency of the clock signal. A regulator produces a power supply for the timer circuitry from a main power supply (Vcc), producing a clock signal with a frequency that is generally independent of temperature and Vcc fluctuations.

Journal ArticleDOI
TL;DR: A single-ended circuit using three-terminal magnetic tunnel junction (3T-MTJ) devices is proposed for a compact nonvolatile lookup-table (NV-LUT) circuit, which makes a high tunnel magneto-resistance ratio used in the circuit.
Abstract: A single-ended circuit using three-terminal magnetic tunnel junction (3T-MTJ) devices is proposed for a compact nonvolatile lookup-table (NV-LUT) circuit. The use of 3T-MTJ devices makes a high tunnel magneto-resistance ratio used in the circuit, because read-current path is separated from the write-current path. By utilizing single-ended circuit structure, the NV-LUT circuit becomes quite simple without reference circuit. In fact, the effective area of the proposed 6-input NV-LUT circuit is only 29% the size of the corresponding CMOS-based implementation using two-terminal-MTJ-based nonvolatile static random access memory cells, with a simulation program with integrated circuit emphasis (SPICE) simulation under a 90 nm CMOS technology.

Journal ArticleDOI
TL;DR: In this paper, an improved transient response using high-frequency feedback control (HFFC) circuit of the constant current ripple constant on-time (CCRCOT) with native adaptive voltage positioning design for voltage regulators (VRs) is proposed.
Abstract: Improved transient response using high-frequency feedback control (HFFC) circuit of the constant current ripple constant on-time (CCRCOT) with native adaptive voltage positioning design for voltage regulators (VRs) is proposed in this study. The concept uses the HFFC circuit to filter V out at the load transient to change the on-time width dynamically, preventing V out from dropping markedly. This proposal does not need an extra pin to achieve a quick response circuit. Finally, the multiphase VR with the HFFC circuit of the CCRCOT for the IC circuit of the proposed buck converter is implemented by experiment and simulation results to verify their viability and superiority.

Journal ArticleDOI
TL;DR: Analytical equations to estimate this frequency range, given a certain maximum allowable budget for variation in delay and gain, are derived and used to design and compare delay cells satisfying given design goals.
Abstract: All-pass filter circuits can implement a time delay but, in practice, show delay and gain variations versus frequency, limiting their useful frequency range. This brief derives analytical equations to estimate this frequency range, given a certain maximum allowable budget for variation in delay and gain. We analyze and compare two well-known gm - RC first-order all-pass circuits, which can be compactly realized in CMOS technology and relate their delay variation to the main pole frequency. Modeling parasitic poles and putting a constraint on gain variation, equations for the maximum achievable pole frequency and delay variation versus frequency are derived. These equations are compared with simulation and used to design and compare delay cells satisfying given design goals.

Patent
14 Mar 2013
TL;DR: In this paper, a method to maintain stability of a low drop-out linear voltage regulator (LDO) includes sensing, by a voltage controlled variable resistor, a node voltage in a feedback network of the LDO, wherein the feedback network includes an error amplifier configured to regulate an output voltage level of the lDO based on a reference voltage.
Abstract: A method to maintain stability of a low drop-out linear voltage regulator (LDO) includes sensing, by a voltage controlled variable resistor, a node voltage in a feedback network of the LDO linear voltage regulator, wherein the feedback network includes an error amplifier configured to regulate an output voltage level of the LDO based on a reference voltage, wherein the node voltage has a dependency on a resistive load current of the LDO, and adjusting, by the voltage controlled variable resistor and based on the sensed node voltage, a resistance value of a RC network in the feedback network, wherein the adaptive RC network produces an adaptive zero in a transfer function of the feedback network, wherein the adaptive zero reduces phase margin degradation due to an output non-dominant pole in the transfer function, and wherein a frequency of the adaptive zero is inversely proportional to the resistance value.

Journal ArticleDOI
TL;DR: In this paper, the authors presented equivalent electric circuits allowing the simulation of the behavior of nanocomposites based on thermosetting resin and nanocarbon filler, which were constructed by employing a multistep simple procedure in which the values and number of the parameters are adjusted until a suitable criterion based on the comparison between simulated and experimental frequency spectra is satisfied.
Abstract: Equivalent electric circuits allowing the simulation of the behavior of nanocomposites based on thermosetting resin and nanocarbon filler are presented. The electric circuits are constructed by employing a multistep simple procedure in which the values and number of the parameters are adjusted until a suitable criterion, based on the comparison between simulated and experimental frequency spectra is satisfied. A resistance-capacitance (RC) simple parallel branch in parallel with a variable number of RC series branches is shown to be capable to reproduce the frequency response of a prepercolative carbon black and two carbon nanotube (CNT) nanocomposites with CNT concentration close to the percolation threshold. The obtained equivalent circuits may be employed for the interpretation of the physical mechanisms underlying the electromagnetic (EM) behavior. Moreover, they can be used in circuit simulators for first-approximation design of EM devices based on such composites.

Journal ArticleDOI
TL;DR: In this paper, the authors examined dissipation effects in a multichannel quantum RC circuit, comprising a cavity or single-electron box capacitively coupled to a gate and connected to a reservoir lead via several conducting channels.
Abstract: We examine dissipation effects in a multichannel quantum RC circuit, comprising a cavity or single-electron box capacitively coupled to a gate and connected to a reservoir lead via several conducting channels. Depending on the engineering details of the quantum RC circuit, the number of channels contributing to transport varies, as does the form of the interchannel couplings. For low-frequency ac transport, the charge-relaxation resistance (${R}_{q}$) is a nontrivial function of the parameters of the system. However, in the vicinity of the charge-degeneracy points and for weak tunneling, we find as a result of cross-mode mixing or channel asymmetry that ${R}_{q}$ becomes universal for a metallic cavity at low temperatures, and equals the unit of quantum resistance. To prove this universality, we map the system to an effective one-channel Kondo model, and construct an analogy with the Coulomb gas. Next, we probe the opposite regime of near-perfect transmission using a bosonization approach. Focusing on the two-channel case, we study the effect of backscattering at the lead-dot interface, more specifically, the role of an asymmetry in the backscattering amplitudes, and make a connection with the weak-tunneling regime near the charge-degeneracy points.

Journal ArticleDOI
TL;DR: In this paper, the authors propose a new modeling approach that defines a new grouping strategy to improve the modeling of an electric double-layer capacitors (SCs) string, which is capable of reproducing the dynamic performance of an SC string with better accuracy.
Abstract: Supercapacitors (SCs), also called electric double-layer capacitors or ultracapacitors, nowadays have a considerable applicability as fast energy storage systems. Mostly, because of its low rated voltage, they are connected in series to reach the required voltage. The most usual approach for SC strings modeling is either the simplification of the whole string to an equivalent RC network, or the concatenation of individual models. However, these approaches lose accuracy because of electrical unbalances between cells. This paper proposes a new modeling approach that defines a new grouping strategy to improve the modeling of an SC string. It implies defining the string modeling around the combination of SCs and voltage balancing circuits. The resulting model is capable of reproducing the dynamic performance of an SC string with better accuracy. Experimental validation corroborates the improved dynamic response of the proposed modeling unit.

Patent
19 Apr 2013
TL;DR: In this article, the authors provide system and method of operation of a driving circuit for a light emitting element in a Time-of-Flight (ToF) camera, where a DC-DC converter is configured to emit a constant current, and is coupled in parallel to a first modulation switch configured to connect the driving circuit to ground.
Abstract: Some aspects of the present disclosure provide system and method of operation of a driving circuit for a light emitting element in a Time-of-Flight (ToF) camera. A DC-DC converter is configured to emit a constant current, and is coupled in parallel to a first modulation switch configured to connect the driving circuit to ground. The first modulation switch is further configured to alternate connections between the current source and ground at a frequency in a desired range of operation to produce an AC current. In some embodiments, an RC circuit element is coupled to an output electrode of the light emitting element and configured to apply a reverse bias to decrease turn-off time of the light emitting element. In some embodiments, a second modulation switch is coupled to the output electrode and configured to apply the reverse bias across the light emitting element. Other systems and methods are also disclosed.