Cadence Design Systems

About: Cadence Design Systems is a company organization based out in San Jose, California, United States. It is known for research contribution in the topics: Circuit design & Routing (electronic design automation). The organization has 3139 authors who have published 3745 publications receiving 66410 citations. The organization is also known as: Cadence Design Systems, Inc.

Fault Diagnosis with Static and Dynamic Observers

Abstract: We study sensor minimization problems in the context of fault diagnosis. Fault diagnosis consists in synthesizing a diagnoser that observes a given plant and identifies faults in the plant as soon as possible after their occurrence. Existing literature on this problem has considered the case of fixed static observers, where the set of observable events is fixed and does not change during execution of the system. In this paper, we consider static observers where the set of observable events is not fixed, but needs to be optimized (e.g., minimized in size). We also consider dynamic observers, where the observer can "switch" sensors on or off, thus dynamically changing the set of events it wishes to observe. It is known that checking diagnosability (i.e., whether a given observer is capable of identifying faults) can be solved in polynomial time for static observers, and we show that the same is true for dynamic ones. On the other hand, minimizing the number of (static) observable events required to achieve diagnosability is NP-complete. We show that this is true also in the case of mask-based observation, where some events are observable but not distinguishable. For dynamic observers' synthesis, we prove that amost permissive finite-state observer can be computed in doubly exponential time, using a game-theoretic approach. We further investigate optimization problems for dynamic observers and define a notion of cost of an observer. We show how to compute an optimal observer using results on mean-payoff games by Zwick and Paterson.

Electronic design for integrated circuits based on process related variations

Abstract: An electronic design is generated for an integrated circuit that is to be fabricated in accordance with the electronic design by a process that will impart topographically induced feature dimension variations to the integrated circuit. The generating includes adjusting the electronic design based on predictions of topographical and topographical-related feature dimension variations by a pattern-dependent model. An RC extraction tool is used in conjunction with the generating and adjusting of the electronic design. The process includes a fabrication process that will impart topographical variation to the integrated circuit and a lithography or etch process. Placement attributes for elements of the integrated circuit are determined.

System and method for providing copyback data integrity in a non-volatile memory system

Abstract: An invention is provided for affording CopyBack data integrity in a non-volatile memory system. When the potential for moving data with a CopyBack command occurs, a counter corresponding to the data is examined. When the counter is below a predetermined limit, the counter is incremented and data from the block of data is moved using a CopyBack command. However, when the counter reaches the predetermined limit, the counter is reset and data from the block of data is moved to system memory and examined for errors. Once any errors are corrected, the data is transferred back to the non-volatile memory.

Behavioral modeling and performance evaluation of microelectrofluidics-based PCR systems using SystemC

Abstract: Composite microsystems that incorporate microelectromechanical and microelectrofluidic devices are emerging as the next generation of system-on-a-chip (SOC). We present a performance comparison between two types of microelectrofluidic systems (MEFS): continuous-flow systems and droplet-based systems. The comparison is based on a specific microelectrofluidic application-a polymerase chain reaction (PCR) system. The behavioral modeling, simulation, and performance evaluation are based on a SystemC design environment. The performance comparison includes the system throughput, system-correction capacity, system-processing capacity, and system-design complexity. By using our system-performance evaluation environment, we demonstrated that the droplet-based MEFS provides higher performance, as well as lower design and integration complexity.

Reliable estimation of execution time of embedded software

Abstract: Estimates of execution time of embedded software play an important role in function-architecture co-design. This paper describes a technique based upon a statistical approach that improves existing estimation techniques. Our approach provides a degree of reliability in the error of the estimated execution time. We illustrate the technique using both control-oriented and computational-dominated benchmark programs.