Institution
Cadence Design Systems
Company•San Jose, California, United States•
About: Cadence Design Systems is a company organization based out in San Jose, California, United States. It is known for research contribution in the topics: Circuit design & Routing (electronic design automation). The organization has 3139 authors who have published 3745 publications receiving 66410 citations. The organization is also known as: Cadence Design Systems, Inc.
Topics: Circuit design, Routing (electronic design automation), Integrated circuit, Integrated circuit design, Physical design
Papers published on a yearly basis
Papers
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TL;DR: Overall, IV acetaminophen was shown to be safe and well tolerated in adult inpatients when given as repeated doses for up to 5 days and demonstrated statistically significantly better ratings for the Subject Global Evaluations for the level of satisfaction with side effects related to study treatments as compared with the control group.
Abstract: Background. Intravenous (IV) acetaminophen provides rapid and effective analgesia in the postoperative and inpatient settings. The utility and efficacy of acetaminophen is well established; however, due to chronic excessive dosing of over-the-counter acetaminophen products and prescription opioid combination products resulting in the potential for hepatic toxicity, concerns remain about acetaminophen safety. In order to evaluate the safety of IV acetaminophen 1,000 mg q6h or 650 mg q4h with repeated dosing for 5 days, a randomized, open-label study assessed the safety and tolerability of repeated doses used to treat acute pain or fever in 213 adult inpatients was conducted.
Methods. Subjects were randomized (3:3:1) to receive IV acetaminophen (1,000 mg q6h or 650 mg q4h) or standard-of-care treatment for pain or fever. Safety was assessed according to spontaneous reports of adverse events (AEs) and clinically meaningful changes from baseline laboratory parameters.
Results. Overall, IV acetaminophen was shown to be safe and well tolerated in adult inpatients when given as repeated doses for up to 5 days. Owing to the comorbidities in the study population, the frequency of AEs reported was high. However, the majority of treatment-emergent adverse events (TEAEs) were unrelated to treatment, and only 8% of the study population withdrew because of TEAEs. No major hepatic issues associated with IV acetaminophen warranted concern, and most hepatic events were likely related to underlying medical conditions or recent trauma/surgery.
Conclusions. Consistent with the tolerability and safety results, both treatment groups (1,000 mg q6h and 650 mg q4h) demonstrated statistically significantly better ratings for the Subject Global Evaluations for the level of satisfaction with side effects related to study treatments as compared with the control group. The findings from this trial support the use of IV acetaminophen as a safe therapy in adult patients.
43 citations
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01 Dec 1995TL;DR: The logic S1S is used to derive simple, rigorous, and constructive solutions to problems in sequential synthesis, and exact and approximate sets of permissible FSM network behavior are obtained.
Abstract: We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematically elegant solutions to problems arising in the synthesis and optimization of synchronous digital hardware. Specifically, we derive a logical expression which yields a single finite state automaton characterizing the set of implementations that can replace a component of a larger design. The power of our approach is demonstrated by the fact that it generalizes immediately to arbitrary interconnection topologies, and to designs containing nondeterminism and fairness. We also describe control aspects of sequential synthesis and relate controller realizability to classical work on program synthesis and tree automata.
43 citations
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10 Jun 2002TL;DR: In this article, a table-based design entry system for signals and instances is presented, where the signal view allows a designer to enter signals to be used in a design, and the instance view allows the designer to define connectivity of pins of the components to signals.
Abstract: Views for signals and instances are provided in a table based design entry system. The signal view allows a designer to enter signals to be used in a design. The signals may be individually entered or imported from pre-defined or external packages of signals. The instance view allows the designer to enter components and to define connectivity of pins of the components to signals. The components may be entered individually or imported from predefined or external packages. An naming routines provides signal name generation and copying names of other components (e.g., pin names) to name the signals. Data entered into the table based entry system is checked for errors (duplicate names, syntax, etc.), and exported to other design tools for processes such as simulation, layout, etc.
43 citations
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01 Jan 2002TL;DR: Hierarchical Modeling and Simulation needs, suitability of Modeling Languages for Hierarchical Design Building Design Environment with SystemC, and performance analysis and design Optimization results are presented.
Abstract: INTRODUCTION Modeling and Simulation Issues Modeling and Simulation Needs Overview HIERARCHICAL MODELING MEFS Dynamic Modeling and Simulation at Circuit Level MEFS System-Level Modeling and Simulation Conclusion SYSTEMC-BASED HIERARCHICAL DESIGN ENVIRONMENT Suitability of Modeling Languages for Hierarchical Design Building Design Environment with SystemC Conclusion SYSTEM-LEVEL SIMULATION AND PERFORMANCE EVALUATION MEFS Computing and Architecture Hierarchical Modeling and Simulation Methodology Micro-Chemical Handling System System Performance Analysis and Design Optimization Conclusion CIRCUIT-LEVEL OPTIMIZATION Simulation Design Methodology Optimization Verification On-Target Design Optimization Robust Design Optimization Application Flexibility Optimization Conclusion PERFORMANCE EVALUATION Introduction Continuous-Flow PCR System Droplet-Based PCR System Comparison Between Continuous-Flow PCR and Droplet PCR Scheduling of Microfluidic Operations for Reconfigurable Two-Dimensional Electrowetting Arrays CONCLUSION APPENDICES VHDL Queuing Model Hierarchical Environment with SystemC Keywords: Nanoscience, Nanotechnology
42 citations
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TL;DR: A method is presented for compensating for the missing information in IBIS by complimenting the IBIS model with a black box that is simulator independent, without compromising with the speed that IBIS enjoys over the transistor models.
Abstract: High level behavioral modeling is widely used in lieu of low level transistor models to ascertain the behavior of input/output (IO) drivers and receivers. The input output buffer information specification (IBIS) is one of the most widely used methodologies to model IO drivers as it satisfies the basic requirements of a behavioral model such as IP protection, simple structure, fast simulation time, and reasonable accuracy. As driver technology gets increasingly complicated and rise time of input signal gets increasingly smaller, important considerations such as simultaneous switching noise (SSN) becomes a major consideration when simulating multiple IO drivers in the integrated circuit. Unfortunately, IBIS falls short of becoming a complete IO behavioral model when simulating for SSN. This paper addresses the problem by assessing what is missing in IBIS. A method is presented for compensating for the missing information by complimenting the IBIS model with a black box that is simulator independent, without compromising with the speed that IBIS enjoys over the transistor models.
42 citations
Authors
Showing all 3142 results
Name | H-index | Papers | Citations |
---|---|---|---|
Alberto Sangiovanni-Vincentelli | 99 | 934 | 45201 |
Derong Liu | 77 | 608 | 19399 |
Andrew B. Kahng | 76 | 618 | 24097 |
Jason Cong | 76 | 594 | 24773 |
Kenneth L. McMillan | 60 | 150 | 20835 |
Edoardo Charbon | 60 | 526 | 12293 |
Richard B. Fair | 59 | 205 | 14653 |
John P. Hayes | 58 | 302 | 11206 |
Sachin S. Sapatnekar | 56 | 424 | 12543 |
Wayne G. Paprosky | 56 | 196 | 10571 |
Robert G. Meyer | 49 | 116 | 13011 |
Scott M. Sporer | 49 | 150 | 8085 |
Charles J. Alpert | 49 | 224 | 8287 |
Joao Marques-Silva | 48 | 289 | 9374 |
Paulo Flores | 48 | 321 | 7617 |