Cadence Design Systems

About: Cadence Design Systems is a company organization based out in San Jose, California, United States. It is known for research contribution in the topics: Circuit design & Routing (electronic design automation). The organization has 3139 authors who have published 3745 publications receiving 66410 citations. The organization is also known as: Cadence Design Systems, Inc.

Design of asynchronous circuits by synchronous CAD tools

Abstract: The roadblock to wide acceptance of asynchronous methodology is poor CAD support. Current asynchronous design tools require a significant re-education of designers, and their features are far behind synchronous commercial tools. This paper considers a particular subclass of asynchronous circuits (null convention logic or NCL) and suggests a design flow that is based entirely on commercial CAD tools. This new design flow shows a significant area improvement over known flows based on NCL.

System and method for simulating discrete functions using ordered decision arrays

Abstract: A system and method increases discrete function simulator performance by creating a data structure that completely and accurately models a system of discrete function elements. A discrete function simulator simulates the system using the data structure. Sequential circuits are converted into blocks of combinational elements having latch variables stored to and read from memory. The simulator performance is dependent upon the number of system inputs and outputs and not on the number of discrete function elements in the circuit being simulated.

Method for eliminating routing congestion in an ic layout

Abstract: The invention relates to a method for eliminating routing congestion (81) in an integrated circuit (IC) layout defined by a placement plan (72, 75) indicating a position within the layout of each cell forming the IC and routing plan (73, 77, 79) describing routes followed by nets interconnecting the cells. Routing congestion is eliminated by estimating routing congestion in various areas of the layout and relocating each cell to least routing congested areas of the layout (83) for which cell relocation results in a reduction in the total lengths of the nets connected to the cell that exceeds a predetermined minimum reduction.

Dalitz plot analysis of the decay B0(B̄0)→K±ππ0

Abstract: The authors report a Dalitz-plot analysis of the charmless hadronic decays of neutral B mesons to K{sup {+-}}{pi}{sup {-+}}{pi}{sup 0}. With a sample of (231.8 {+-} 2.6) x 10{sup 6}{Upsilon}(4S) {yields} B{bar B} decays collected by the BABAR detector at the PEP-II asymmetric-energy B Factory at SLAC, they measure the magnitudes and phases of the intermediate resonant and nonresonant amplitudes for B{sup 0} and {bar B}{sup 0} decays and determine the corresponding CP-averaged branching fractions and charge asymmetries. The inclusive branching fraction and CP-violating charge asymmetry are measured to be {Beta}(B{sup 0} {yields} K{sup +}{pi}{sup -}{pi}{sup 0}) = (35.7{sub -1.5}{sup +2.6} {+-} 2.2) x 10{sup -6}, and {Alpha}{sub CP} = -0.030{sub -0.051}{sup +0.045} {+-} 0.055 where the first errors are statistical and the second systematic. They observe the decay B{sup 0} {yields} K*{sup 0}(892){pi}{sup 0} with the branching fraction {Beta}(B{sup 0} {yields} K*{sup 0}(892){pi}{sup 0}) = (3.6{sub -0.8}{sup +0.7} {+-} 0.4) x 10{sup -6}. This measurement differs from zero by 5.6 standard deviations (including the systematic uncertainties). The selected sample also contains B{sup 0} {yields} {bar D}{sup 0}{pi}{sup 0} decays where {bar D}{sup 0} {yields} K{sup +}{pi}{sup -}, and they measure {Beta}(B{sup 0} {yields} {bar D}{sup 0}{pi}{sup 0}) = (2.93 {+-} 0.17 {+-} 0.18) x 10{sup -4}.

Probabilistic state space search

Abstract: This paper describes a probabilistic approach to state space search. The presented method applies a ranking of the design states according to their probability of reaching a given target state based on a random walk model. This ranking can be used to prioritize an explicit or partial symbolic state exploration to find a trajectory from a set of initial states to a set of target states. A symbolic technique for estimating the reachability probability is described which implements a smooth trade-off between accuracy and computing effort. The presented probabilistic state space search complements incomplete verification methods which are specialized in finding errors in large designs.