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A New Dual-Material Double-Gate (DMDG) Nanoscale SOI MOSFET - Two-dimensional Analytical Modeling and Simulation

TLDR
In this paper, the authors presented the unique features exhibited by modified asymmetrical double gate (DG) silicon on insulator (SOI) MOSFET, which exhibits significantly reduced short channel effects.
Abstract
In this paper, we present the unique features exhibited by modified asymmetrical Double Gate (DG) silicon on insulator (SOI) MOSFET. The proposed structure is similar to that of the asymmetrical DG SOI MOSFET with the exception that the front gate consists of two materials. The resulting modified structure, Dual Material Double Gate (DMDG) SOI MOSFET, exhibits significantly reduced short channel effects when compared with the DG SOI MOSFET. Short channel effects in this structure have been studied by developing an analytical model. The model includes the calculation of the surface potential, electric field, threshold voltage and drain induced barrier lowering. A model for the drain current, transconductance, drain conductance and voltage gain is also discussed. It is seen that short channel effects in this structure are suppressed because of the perceivable step in the surface potential profile, which screens the drain potential. We further demonstrate that the proposed DMDG structure provides a simultaneous increase in the transconductance and a decrease in the drain conductance when compared with the DG structure. The results predicted by the model are compared with those obtained by two-dimensional simulation to verify the accuracy of the proposed analytical model.

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Citations
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Estimation of analog/RF figures-of-merit using device design engineering in gate stack double gate MOSFET

TL;DR: In this article, the analog performance as well as some new RF figures of merit are reported for the first time of a gate stack double gate (GS-DG) metal oxide semiconductor field effect transistor (MOSFET) with various gates and channel engineering.
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Effect of gate engineering in double-gate MOSFETs for analog/RF applications

TL;DR: It is demonstrated that TM-DG MOSFET can be a viable option to enhance the performance of SOI technology for high-frequency analog applications.
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An Analytical Model for Tunnel Barrier Modulation in Triple Metal Double Gate TFET

TL;DR: An analytical model for tunnel barrier modulation in triple metal double gate tunnel FET is presented for the first time in this paper, where three different metals over the channel region assist to form a barrier in the channel which restricts the reverse tunneling of the carrier, i.e., tunneling from drain to source.
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2-D Analytical Modeling of Threshold Voltage for Graded-Channel Dual-Material Double-Gate MOSFETs

TL;DR: In this article, a 2D analytical model for the surface potential and threshold voltage of graded-channel dual-material double-gate (GCDMDG) MOSFETs obtained by intermixing the concepts of graded doping in channel and dual material in gate engineering has been proposed.
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Analytical study of Dual Material Surrounding Gate MOSFET to suppress short-channel effects (SCEs)

TL;DR: In this article, a 2D analytical model for the Dual Material Surrounding Gate MOSFET (DMSG) by solving the Poisson equation has been proposed and verified using ATLAS TCAD device simulator.
References
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Journal ArticleDOI

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