scispace - formally typeset
Proceedings ArticleDOI

Novel self-compliance Bipolar 1D1R memory device for high-density RRAM application

TLDR
Experimental results show that the novel self-compliance bipolar 1D1R device has high potentiality for high-density integrated nonvolatile memory application.
Abstract
Different from conventional unipolar type 1D1R RRAM devices, in this paper, a bipolar type 1D1R RRAM device structure is firstly proposed and successfully demonstrated by the combined TiOx-based Schottky diode and Cu/HfO2/Pt bipolar RRAM cell. Reliable and uniform self-compliance resistive switching characteristics are obtained by imposing current compliance using the reverse bias current of the TiOx-based Schottky diode. Experiment results show that the novel self-compliance bipolar 1D1R device has high potentiality for high-density integrated nonvolatile memory application.

read more

Citations
More filters
Journal ArticleDOI

Area-Efficient SOT-MRAM With a Schottky Diode

TL;DR: In this paper, a spin-orbit torque magnetic random access memory (SOT-MRAM) was proposed for high-density, reliable, and energy-efficient on-chip memory application.
Journal ArticleDOI

Crossbar array of selector-less TaOx/TiO2 bilayer RRAM

TL;DR: This work implemented self-rectifying TaOx/TiO2 RRAM in a selector-less 6 × 6 crossbar array with various desiring features, including simple fabrication using only three masks, and stable bipolar resistive-switching characteristics without the need for electro-forming and current compliance.
Journal ArticleDOI

Area-Efficient Multibit-per-Cell Architecture for Spin-Orbit-Torque Magnetic Random-Access Memory With Dedicated Diodes

TL;DR: A multibit-per-cell architecture for spin-orbit torque magnetic random access memory (MBC SOT-MRAM) for high-density memory applications by employing two diode-based magnetic tunnel junctions with a shared common heavy metal electrode, which leads to at least double the density compared to existing MRAM designs.
Journal ArticleDOI

Area Efficient Shared Diode Multi-Level Cell SOT-MRAM

TL;DR: In this paper, the authors proposed a diode-based multi-level cell spin-orbit torque magnetic random access memory (SOT-MRAM) for high density memory applications.
Journal ArticleDOI

A Physically Transient Self-Rectifying and Analogue Switching Memristor Synapse

TL;DR: In this article, a physical transient memristor synapse with self-rectifying and analogue switching behaviors based on Mo/MgO/AZO (Al2O3 2 wt %, ZnO 98 Wt %)/W is presented.
References
More filters
Proceedings ArticleDOI

2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM Applications

TL;DR: In this article, a 2-stack 8-times-8 array with 0.5 mumtimes0.5 cells was proposed to demonstrate the feasibility of high density stacked RRAM.
Proceedings ArticleDOI

Evidence and solution of over-RESET problem for HfO X based resistive memory with sub-ns switching speed and high endurance

TL;DR: In this article, a modified bottom electrode is proposed for the memory device to maintain the memory window and to endure resistive switching up to 1010 cycles, and the performance of the HfO X-based bipolar resistive memory was improved.

2-stack ID-IRCross-point Structure withOxideDiodes asSwitch Elements for HighDensity Resistance RAM Applications

TL;DR: In this paper, a 2-stack 8x8array ID-RRAM has been successfully integrated into a 2.5umx0.5u cells ID-IRstructures duetethe compatibility ofoxide in order to demonstrate the feasibility of highdensity stacked-based p-ndiodes and memory nodes.
Proceedings Article

Bi-layered RRAM with unlimited endurance and extremely uniform switching

TL;DR: This work demonstrates resistive random access memory (RRAM) architecture with bi-layered switching element for reliable resistive switching memory based on the modulated Schottky barrier modeling.
Proceedings ArticleDOI

Stack friendly all-oxide 3D RRAM using GaInZnO peripheral TFT realized over glass substrates

TL;DR: In this article, a GaInZnO (GIZO) thin film transistors (TFTs) integrated with 1D-1R (NiO) (one diode-one resistor) structure oxide memory node element is presented.
Related Papers (5)