Showing papers on "Negative impedance converter published in 2015"

Negative capacitance in a ferroelectric capacitor.

Abstract: The Boltzmann distribution of electrons poses a fundamental barrier to lowering energy dissipation in conventional electronics, often termed as Boltzmann Tyranny. Negative capacitance in ferroelectric materials, which stems from the stored energy of a phase transition, could provide a solution, but a direct measurement of negative capacitance has so far been elusive. Here, we report the observation of negative capacitance in a thin, epitaxial ferroelectric film. When a voltage pulse is applied, the voltage across the ferroelectric capacitor is found to be decreasing with time--in exactly the opposite direction to which voltage for a regular capacitor should change. Analysis of this 'inductance'-like behaviour from a capacitor presents an unprecedented insight into the intrinsic energy profile of the ferroelectric material and could pave the way for completely new applications.

Sub-60mV-swing negative-capacitance FinFET without hysteresis

Abstract: In this work, we report the first Negative-Capacitance FinFET. ALD Hf042Zr058O2 is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO2 ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.

Virtual Impedance Current Limiting for Inverters in Microgrids With Synchronous Generators

Abstract: This paper focuses on current limiting for voltage-controlled inverters during overloads caused by poor transient load sharing between inverters and synchronous generators in islanded microgrids The use of simple current reference saturation limiters can cause instability when the voltage regulator loses control after the current reference saturates The use of virtual impedance for current limiting is shown to improve transient stability during current limiting when operating in parallel with synchronous generators Small-signal analysis is used to set the virtual impedance magnitude and $X/R$ ratio, and validation is provided by simulation and experimental results

Negative Capacitance in Organic/Ferroelectric Capacitor to Implement Steep Switching MOS Devices.

Abstract: Because of the “Boltzmann tyranny” (i.e., the nonscalability of thermal voltage), a certain minimum gate voltage in metal–oxide–semiconductor (MOS) devices is required for a 10-fold increase in drain-to-source current. The subthreshold slope (SS) in MOS devices is, at best, 60 mV/decade at 300 K. Negative capacitance in organic/ferroelectric materials is proposed in order to address this physical limitation in MOS technology. Here, we experimentally demonstrate the steep switching behavior of a MOS device—that is, SS ∼ 18 mV/decade (much less than 60 mV/decade) at 300 K—by taking advantage of negative capacitance in a MOS gate stack. This negative capacitance, originating from the dynamics of the stored energy in a phase transition of a ferroelectric material, can achieve the step-up conversion of internal voltage (i.e., internal voltage amplification in a MOS device). With the aid of a series-connected negative capacitor as an assistive device, the surface potential in the MOS device becomes higher than ...

Improving the Stability of Cascaded DC/DC Converter Systems via Shaping the Input Impedance of the Load Converter With a Parallel or Series Virtual Impedance

Abstract: Interactions between individually designed power subsystems in a cascaded system may cause instability. This paper proposes an approach, which connects a virtual impedance in parallel or series with the input impedance of the load converter so that the magnitude or phase of the load converter's input impedance is modified in a small range of frequency, to solve the instability problem of a cascaded system. The requirements on the parallel virtual impedance (PVI) and series virtual impedance (SVI) are derived, and the control strategies to implement the PVI and SVI are proposed. The comparison and general design procedure of the PVI and SVI control strategies are also discussed. Finally, considering the worst stability problem that often occurs at the system whose source converter is an $LC$ filter, two cascaded systems consisting of a source converter with an $LC$ input filter and a load converter, which is either a buck converter or a boost converter, are fabricated and tested to validate the effectiveness of the proposed control methods.

Interleaved Buck Converter With Continuous Input Current, Extremely Low Output Current Ripple, Low Switching Losses, and Improved Step-Down Conversion Ratio

Abstract: This paper proposes an interleaved buck converter (IBC) with continuous input current, extremely low output current ripple, low switching losses, and improved step-down conversion ratio Unlike the conventional IBC, the proposed converter has a continuous input current, and its output current ripple is extremely low The proposed converter has a lower voltage stress in comparison to the conventional IBC and can also provide a high step-down ratio, which makes it a proper choice for high-power applications where a nonisolated step-down converter with low output current ripple and continuous input current is required Also, the proposed converter can provide current sharing between two interleaved modules without using additional current-sharing control method All of these benefits are obtained without any additional stress on the circuit components A prototype converter with 200-V input and 24-V–10-A output is implemented to verify the theoretical analysis Operational principles and experimental results are presented in this paper

Bidirectional PWM Converter Integrating Cell Voltage Equalizer Using Series-Resonant Voltage Multiplier for Series-Connected Energy Storage Cells

Abstract: In conventional energy storage systems using series-connected energy storage cells such as lithium-ion battery cells and supercapacitors (SCs), an interface bidirectional converter and cell voltage equalizer are separately required to manage charging/discharging and ensure years of safe operation. In this paper, a bidirectional PWM converter integrating cell voltage equalizer is proposed. This proposed integrated converter can be derived by combining a traditional bidirectional PWM converter and series-resonant voltage multiplier (SRVM) that functionally operates as an equalizer and is driven by asymmetric square wave voltage generated at the switching node of the converter. The converter and equalizer can be integrated into a single unit without increasing the switch count, achieving not only system-level but also circuit-level simplifications. Open-loop control is feasible for the SRVM when operated in discontinuous conduction mode, meaning the proposed integrated converter can operate similarly to conventional bidirectional converters. An experimental charge–discharge cycling test for six SCs connected in series was performed using the proposed integrated converter. The cell voltage imbalance was gradually eliminated by the SRVM while series-connected SCs were cycled by the bidirectional converter. All the cell voltages were eventually unified, demonstrating the integrated functions of the proposed converter.

Novel High-Conversion-Ratio High-Efficiency Isolated Bidirectional DC–DC Converter

Abstract: This paper proposes a novel high-conversion-ratio high-efficiency isolated bidirectional dc–dc converter. The proposed converter is operated in the step-down stage. The dc-blocking capacitor in the high-voltage side is used to reduce the voltage on the transformer, and the current-doubler circuits are used in the low-voltage side to reduce the output current ripple. The energy stored in the leakage inductance is recycled to the dc-blocking capacitor. When the proposed converter is operated with a step-up function, dual current-fed circuits on the low-voltage side are used to reduce the current ripples and conduction losses of the switches in the low-voltage side. The voltage-doubler circuit in the high-voltage side increases the conversion ratio. The proposed converter can achieve high conversion with high efficiency. Experimental results based on a prototype implemented in the laboratory with a high voltage of 200 V, low voltage of 24 V, and output power of 200 W verify the performance of the proposed converter. The peak efficiency of the proposed converter in the high-step-down and high-step-up stages is 96.3% and 95.6%, respectively.

High-Gain Zero-Voltage Switching Bidirectional Converter With a Reduced Number of Switches

Abstract: A nonisolated bidirectional dc–dc converter has been proposed in this brief for charging and discharging the battery bank through a single circuit in applications of uninterruptible power supplies and hybrid electric vehicles. The proposed bidirectional converter operates under a zero-voltage switching condition and provides large voltage diversity in both modes of operation. This enables the circuit to step up the low-battery bank voltage to high dc-link voltage, and vice versa. The bidirectional operation of the converter is achieved by employing only three active switches, a coupled inductor, and an additional voltage clamped circuit. A complete description of the operation principle of the circuit is explained, and the design procedure of the converter has been discussed. The experimental results of a 300-W prototype of the proposed converter confirmed the validity of the circuit. The maximum efficiency of 96% is obtained at half load for boost operation mode and 92% for buck mode of operation.

Coupled‐inductor boost integrated flyback converter with high‐voltage gain and ripple‐free input current

Abstract: DC–DC converters with high-voltage gain and low-input current ripple have attracted much attention in photovoltaic, fuel cells and other renewable energy system applications. Conventional boost–flyback converter can achieve high-voltage set-up ratio; however, its input current is pulsing and the voltage stress across output diode of flyback-cell is high. In this study, by incorporating coupled-inductor into the boost-cell of boost–flyback converter, the voltage stress across the output diode is effectively reduced. Passive snubber circuit is utilised to suppress the voltage spike across power switch, low-voltage-rated metal–oxide semiconductor field effect transistor (MOSFET) with low R ds_on can thus be used to reduce the conduction loss of power MOSFET. In addition, ripple-free input current can be achieved, which makes the design of electromagnetic interference filter easy. Steady-state characteristics of the proposed converter are analysed, and experimental results are given to verify the analysis results.

A non-isolated bidirectional soft switching current fed LCL resonant dc/dc converter to interface energy storage in DC microgrid

Abstract: This paper proposes a non-isolated soft-switching bidirectional dc/dc converter for interfacing energy storage in DC microgrid. The proposed converter employs a half-bridge boost converter at input port followed by a LCL resonant circuit to assist in soft-switching of switches and diodes, and finally a voltage doubler circuit at output port to enhance the voltage gain by 2x. The LCL resonant circuit may also add a suitable voltage gain to the converter. Therefore, overall high voltage gain of the converter is obtained without transformer or large number of multiplier circuit. For buck operation, the high side voltage is first divided by half with capacitive divider to gain higher step down ratio. Converter is operated at high frequency to obtain low output voltage ripple and reduced magnetics and filters. Zero voltage turn-on is achieved for all switches and zero current turnon and turn-off is achieved for all diodes for both buck/boost operation. Voltage stress across switches and diode is clamped naturally without external snubber circuit. An experimental prototype rated at 350 W has been designed, built and tested in the laboratory to verify the analysis, design and demonstrate the performance of proposed converter.

Enhanced Dynamic Voltage Control of Type 4 Wind Turbines During Unbalanced Grid Faults

Abstract: The fully rated converter of type 4 wind turbines is capable of providing dynamic voltage control during grid faults by injecting controlled reactive currents. This paper describes three different dynamic voltage control options during unbalanced grid faults: 1) the positive sequence voltage control with only a positive sequence reactive current injection and suppression of the negative sequence current; 2) the positive sequence voltage control with limitation of the positive sequence reactive current injection and suppression of the negative sequence current; and 3) the positive and negative sequence voltage control with both a positive and a negative sequence reactive current injection. These different control options are compared in simulations of a wind power plant connected to a meshed power system, including synchronous generators. It is shown that both the positive sequence voltage control with limitation and the positive and negative sequence voltage control can overcome the voltage rise and voltage distortion that can occur with pure positive sequence voltage control without limitation. Both of these options have a distinct fault response, where the positive and negative sequence voltage control results in a fault response that resembles the fault response of a synchronous generator with higher fault current contributions in the faulted phases.

Grid Parameter Estimation Using Model Predictive Direct Power Control

Abstract: This paper presents a novel finite-control-set model predictive control (FS-MPC) approach for grid-connected converters. The control performance of such converters may get largely affected by variations in the supply impedance, especially for systems with low short-circuit ratio values. A novel idea for estimating the supply impedance variation, and hence the grid voltage, using an algorithm embedded in the MPC is presented in this paper. The estimation approach is based on the difference in grid voltage magnitudes at two consecutive sampling instants, calculated on the basis of supply currents and converter voltages directly within the MPC algorithm, achieving a fast estimation and integration between the controller and the impedance estimator. The proposed method has been verified, using simulation and experiments, on a three-phase two-level converter.

Disturbance Observer-Based Voltage Regulation of Current-Mode-Boost-Converter-Interfaced Photovoltaic Generator

Abstract: In this paper, a robust control method based on a disturbance observer is proposed to regulate the terminal voltage of a photovoltaic generator, interfaced by a current mode-controlled boost dc–dc converter. The combined generator-converter-load system possesses a nonlinear behavior, highly dependent on operation point and environmental variables, thus burdening the control task. It is shown that employing a typical linear controller, designed according to a single nominal operating point, results in a closed-loop performance, varying from a highly overdamped near open-circuit condition to greatly underdamped around short-circuit conditions. On the other hand, when the proposed robust controller is utilized, the closed-loop performance remains nearly nominal throughout the whole operation range. In addition, it is shown that, by sacrificing the performance in the vicinity of the open-circuit point, it is possible to implement the controller using a single op-amp with a reduced part count. Simulation and experimental results are presented to verify the proposed method.

Simple Wide Frequency Range Impedance Meter Based on AD5933 Integrated Circuit

Abstract: As it contains elements of complete digital impedance meter, the AD5933 integrated circuit is an interesting solution for impedance measurements. However, its use for measurements in a wide range of impedances and frequencies requires an additional digital and analogue circuitry. This paper presents the design and performance of a simple impedance meter based on the AD5933 IC. Apart from the AD5933 IC it consists of a clock generator with a programmable prescaler, a novel DC offset canceller for the excitation signal based on peak detectors and a current to voltage converter with switchable conversion ratios. The authors proposed a simple method for choosing the measurement frequency to minimalize errors resulting from the spectral leakage and distortion caused by a lack of an anti-aliasing filter in the DDS generator. Additionally, a novel method for the AD5933 IC calibration was proposed. It consists in a mathematical compensation of the systematic error occurring in the argument of the value returned from the AD5933 IC as a result. The performance of the whole system is demonstrated in an exemplary measurement.

An anti-ferroelectric gated Landau transistor to achieve sub-60 mV/dec switching at low voltage and high speed

Abstract: Landau field effect transistors promise to lower the power-dissipation of integrated circuits (ICs) by reducing the subthreshold swing (S) below the Boltzmann limit of 60 mV/dec. The key idea is to replace the classical gate insulator with dielectrics that exhibit negative capacitance (NC) associated with double-well energy landscape, for example, ferroelectrics (FE), air-gap capacitors, or a combination thereof. Indeed, S is dramatically reduced, constrained only by the limits of hysteresis-free operation. Unfortunately, the following limitations apply (i) the need for capacitance matching constrains steep S only to the small subthreshold region for FE based negative capacitance field effect transistor (NCFET) and requires an insulator too thick for sub-20 nm scaling; (ii) the kinetics of mechanical switching for airgap based NCFET obviate high-speed operation; and (iii) the lattice mismatch between the substrate and the dielectric makes defect-free integration difficult. In this article, we demonstrate ...

Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency

Abstract: We have shown a practical device design guideline for sub-0.2V ultra-low power, steep slope ferroelectric FET using negative capacitance (NC) focusing on operation speed, material requirement, and energy efficiency for the first time. The operation speed is determined by finite switching time of ferroelectric polarization. For low supply voltage and hysteresis-free design, there exists a ferroelectric material parameter window to maximize the benefit of steep slope by NC. By the optimized device design, the energy efficiency is improved by 2.5x. The minimum energy voltage is pushed down to sub-0.2V range.

Small-signal impedance modelling of type-III wind turbine

Abstract: Impedance-based small signal analysis is a useful tool to examine resonance between type-III wind turbines and the grid, but no accurate and complete model of the turbine has been presented for the frequency range that covers from a few Hz to a few kHz Existing models either ignore the effects of the converters or do not model such effects correctly This paper presents positive- and negative-sequence impedance models of the turbine with and without phase-lock loop (PLL) This paper also gives an overview on the modelling approach taken to model the machine with PLL dynamics Finally, the models are validated with impedance sweeps using real-time simulation

Power Control of Grid-Connected Converters Under Unbalanced Voltage Conditions

Abstract: This paper presents a grid current control technique on the power converter level. The submitted analysis deals with a control method of positive and negative current sequences in a grid-connected converter during voltage sags. The control method should assure the proper exchange of active and reactive powers without power ripple, the mitigation of harmonic distortion of grid currents, and should also enable the control of grid current peaks. A simple expression is determined, which allows estimation of maximum active and reactive powers exchanged between the grid and the converter without exceeding the admissible converter current. Some simulation and experimental results are reported to validate the theoretically predicted performance of the control strategy.

Evaluation and optimization of short channel ferroelectric MOSFET for low power circuit application with BSIM4 and Landau theory

Abstract: Based on BSIM4 parameters of 45 nm metal gate/high-k CMOS process and Landau theory, gate and output characteristics of short channel ferroelectric MOSFET (FeFET) are evaluated to explore its optimal structure for low power circuit application. Unlike previously reported simulation results of long channel FeFET, our work reveals that its current–voltage performance is quite susceptible to the parasitic capacitance between the gate and drain. As a consequence, there is a large threshold voltage increase with drain voltage and output characteristics hardly get saturated, indicating that short channel FeFET is not suitable for analog circuit applications. One effective way to address the issues is to minimize the gate-to-drain parasitic overlap and fringing field capacitances. With the tool Purdue Emerging Technology Evaluator, the inverter performance consisting of modified FeFETs is also simulated. Compared with intrinsic inverter, its energy consumption per cycle is much lower at any supply voltage VDD and the propagation delay is also smaller at very low VDD. Our work shows that the optimized FeFET structure, designed by mitigating gate-to-drain parasitic, is suitable for both analog and digital low power circuit designs.

Impact of temperature on negative capacitance field-effect transistor

Abstract: A negative capacitance field-effect transistor (FET) with sub-60 mV/decade subthreshold slope (SS) at different temperatures (i.e. 14.8 mV/decade at 300 K, 15.7 mV/decade at 360 K and 24.3 mV/decade at 400 K) is experimentally demonstrated. A detailed account of the fabrication process of a negative capacitor is first introduced, followed by the measurement setup for the negative capacitance FET. The impact of temperature on negative capacitance FETs is investigated: (i) the equation for the internal voltage gain in the FET as a function of temperature is derived using Gibbs free energy and (ii) internal voltage against gate voltage (V Int against V G), internal voltage gain against gate voltage (dV Int/dV G against V G) and drain current against gate voltage (I D against V G) curves at different temperatures are measured. It is confirmed that internal voltage amplification can be achieved using the ferroelectric capacitor. However, the magnitude of the step-up voltage transformation is reduced, i.e. from 9.5 at 300 K to 2.6 at 400 K. Additionally, the SS is slightly increased (i.e. degrading from 14.8 mV/decade at 300 K to 24.3 mV/decade at 400 K) with increasing temperature; however, all SS values are better than the physical limits of SS as dictated by Boltzmann statistics.

Improved Luo converter modifications with increasing voltage ratio

Abstract: The study provides improved modifications of the positive output super-lift Luo converter that allows significantly increase the voltage transfer gain by the modest means. In the simplest case this increase is provided by replacing the inductor by the switched-inductor structure consisting of two inductors and three diodes. This allows getting practically double increase in the line-to-output voltage ratio at the high values of duty cycle. Analysis of steady-state and transient conditions shows that the zeros of the transfer function for the converter, as well as for the conventional boost converter, are positive. The study indicates possible ways to further increase the output voltage ratio without additional switches – by the use of magnetically coupled inductors and diode-capacitor voltage multipliers. Simulation and experimental results confirm the theoretical analysis and the advantages of the proposed converters.

Analysis of negative capacitance and self-heating in organic semiconductor devices

Abstract: In admittance spectroscopy of organic semiconductor devices, negative capacitance values arise at low frequency and high voltages. This study aims at explaining the influence of self-heating on the frequency-dependent capacitance and demonstrates its impact on steady-state and dynamic experiments. Therefore, a one dimensional numerical drift-diffusion model extended by the heat equation is presented. We calculate the admittance with two approaches: a Fourier method that is applied to time domain data and a numerically efficient sinusoidal steady state analysis (S3A), which is based on the linearization of the equations around the operating point. The simulation results coincide well with the experimental findings from reference [H. Okumoto and T. Tsutsui, Appl. Phys. Express 7, 061601 (2014)] where the negative capacitance effect of an organic device becomes weaker with better cooling of the structure. Linking the frequency- and time-domain with the Fourier approach supports an effortless interpretation o...

Digital control of isolated Cuk power factor correction converter under wide range of load variation

Abstract: This study presents a novel digital double-loop control method, that is, inner current loop and outer voltage loop, for a single-stage isolated Cuk power factor correction (PFC) converter in continuous conduction mode (CCM). First, control law of current loop, consisting of a current term and a voltage term, is derived. Considering that inductance value of inductors varies with load change, an adaptive gain scheduling method is applied to change the current term. Second, control law of voltage loop is derived based on proportional-integral control with introducing linearisation and feedforward compensation. Meanwhile, a moving average filter is utilised to decrease ripple effect of output voltage, and thus smoother input signal for current loop and fast dynamic response for voltage loop are guaranteed. A 1600 W one-phase isolated Cuk PFC converter controlled by a digital signal processor is developed and achieves power factor higher than 0.99, total harmonic distortion of input current lower than 8.5% with load varying from 25 to 100% and fast dynamic response performance. Finally, a 4800 W three-phase AC–DC converter based on the above PFC converter is implemented and its performance additionally indicate that current sharing issue can be easy to deal with by using the proposed control method.

A Broadband GaN pHEMT Power Amplifier Using Non-Foster Matching

Abstract: Non-Foster matching is applied to design a multi- octave broadband GaN power amplifier (PA) in this paper. The bandwidth limitation from high-Q interstage matching is overcome through the use of negative capacitor, which is realized with a negative impedance converter (NIC) using the cross-coupled GaN FETs. For high power operation over the entire bandwidth, the natural interstage matching is optimized for the upper subfrequency band and the lower subfrequency band is compensated for by the negative capacitance presented by non-Foster circuit (NFC). Detailed analysis is presented to understand the frequency and power limits of NIC circuits for PA applications. Two negative impedance matched PAs (NMPAs) are fabricated with 0.25- $\mu$ m GaN pHEMT process. The implemented PA with $2{\times}$ combining shows the output powers of 35.7–37.5 dBm with the power added efficiencies of 13–21% from 6 to 18 GHz. The $4{\times}$ combining PA achieves over 5 W output power from 7 to 17 GHz. The NFC boosts the efficiencies and power below 12 GHz to achieve broadband performance without using any lossy matching or negative feedback. To our knowledge, this is the first demonstration of NIC-based broadband amplifiers with multi-watt-level output power.

Online Reference Limitation Method of Shunt-Connected Converters to the Grid to Avoid Exceeding Voltage and Current Limits Under Unbalanced Operation—Part II: Validation

Abstract: This paper focuses the analysis around a grid-connected converter that operates under unbalanced voltage and current conditions. Two different scenarios have been selected to validate the proposed algorithms. In the first scenario, the converter operates as a reactive power compensator, exchanging reactive power with the grid, and minimizing the dc bus voltage oscillations. The second scenario is more challenging, since it operates as a load balancer. In this application, the unbalanced current consumption of the load is compensated by the converter, exchanging positive and negative sequence currents with the grid. Another objective in this second scenario is to compensate the reactive power of the unbalanced load. It is important to highlight that in both scenarios, any maximum limit of the converter can be exceeded due to the specific unbalanced voltage and current conditions. Three variables are considered critical for the converter: 1) output ac current limit; 2) output ac voltage limit; and 3) dc bus voltage oscillation limit. Thus, this paper proposes a control method, which limits online the reactive power reference in the first scenario and the exchanged current references in the second scenario in order not to exceed any of the mentioned critical variables. The corresponding experimental results are shown in Part II of this paper so as to validate the limitation algorithm obtained by means of the mathematical analysis carried out in Part I.

The Cross-Coupled Pair?Part III [A Circuit for All Seasons]

Abstract: In this article, we study applications of the cross-coupled pair (XCP) in analog and RF circuits The XCP can serve as a negative resistance or a negative impedance converter in small-signal operation, or a regenerative circuit in large-signal operation

Dual active bridge DC-DC converter using both full and half bridge topologies to achieve high efficiency for wide load

Abstract: This papar proposes which the Dual Active Bridge (DAB) converter changes between Full Bridge (FB) converter's operation and Half Bridge (HB) converter's operation on the secondary side of the high frequency transformer depending on the output power. With the HB converter operation's, the iron loss of the transformer becomes small because the secondary voltage of the transformer becomes half compared to the FB converter's operation. In addition, Zero Voltage Switching (ZVS) is achieved at the light load. Therefore, the proposed circuit can obtain the high efficiency for the wide load by the changing the HB and the FB converter's operation depending on the output power. In this paper, the changing point between the HB and the FB converter is derived using the loss calculation. The validity of the proposed circuit is verified by 800-W prototype. From the experimental results, it is confirmed that the proposed circuit has the two local maximum efficiencies which are 92.9% and 93.4% at the light load and the heavy load using the proposed circuit.