Showing papers on "Polycrystalline silicon published in 2019"

Green fabrication of stable lead-free bismuth based perovskite solar cells using a non-toxic solvent

Abstract: The very fast evolution in certified efficiency of lead-halide organic-inorganic perovskite solar cells to 24.2%, on par and even surpassing the record for polycrystalline silicon solar cells (22.3%), bears the promise of a new era in photovoltaics and revitalisation of thin film solar cell technologies. However, the presence of toxic lead and particularly toxic solvents during the fabrication process makes large-scale manufacturing of perovskite solar cells challenging due to legislation and environment issues. For lead-free alternatives, non-toxic tin, antimony and bismuth based solar cells still rely on up-scalable fabrication processes that employ toxic solvents. Here we employ non-toxic methyl-acetate solution processed (CH3NH3)3Bi2I9 films to fabricate lead-free, bismuth based (CH3NH3)3Bi2I9 perovskites on mesoporous TiO2 architecture using a sustainable route. Optoelectronic characterization, X-ray diffraction and electron microscopy show that the route can provide homogeneous and good quality (CH3NH3)3Bi2I9 films. Fine-tuning the perovskite/hole transport layer interface by the use of conventional 2,2′,7,7′-tetrakis (N,N′-di-p-methoxyphenylamino)−9,9′-spirbiuorene, known as Spiro-OMeTAD, and poly(3-hexylthiophene-2,5-diyl - P3HT as hole transporting materials, yields power conversion efficiencies of 1.12% and 1.62% under 1 sun illumination. Devices prepared using poly(3-hexylthiophene-2,5-diyl hole transport layer shown 300 h of stability under continuous 1 sun illumination, without the use of an ultra violet-filter. Perovskites are widely studied as components of solar cells but their synthesis often involves toxic reagents. Here lead-free bismuth-based perovskites are synthesised using a non-toxic solvent and shown to achieve power conversion efficiencies of up to 1.62 % under 1 sun illumination for up to 300 h.

Hydrogenation of Phosphorus-Doped Polycrystalline Silicon Films for Passivating Contact Solar Cells.

Abstract: We characterize and discuss the impact of hydrogenation on the performance of phosphorus-doped polycrystalline silicon (poly-Si) films for passivating contact solar cells. Combining various characterization techniques including transmission electron microscopy, energy-dispersive X-ray spectroscopy, low-temperature photoluminescence spectroscopy, quasi-steady-state photoconductance, and Fourier-transform infrared spectroscopy, we demonstrate that the hydrogen content inside the doped poly-Si layers can be manipulated to improve the quality of the passivating contact structures. After the hydrogenation process of poly-Si layers fabricated under different conditions, the effective lifetime and the implied open circuit voltage are improved for all investigated samples (up to 4.75 ms and 728 mV on 1 Ω cm n-type Si substrates). Notably, samples with very low initial passivation qualities show a dramatic improvement from 350 μs to 2.7 ms and from 668 to 722 mV.

Silicon Few-Layer Graphene Nanocomposite as High-Capacity and High-Rate Anode in Lithium-Ion Batteries

Abstract: A silicon-graphene heterostructure provides optimal electrochemical performance as anode nanomaterial in both half and full cells with a commercial NMC111 (LiNi1/3Mn1/3Co1/3O2) cathode. The anode consists of carbon-coated polycrystalline silicon nanoparticles in between a parallel oriented few-layers graphene flakes (FLG). Electrochemical tests in lithium cells display high capacity values (∼2300 mAh/g) with a Coulombic efficiency (CE) reaching 99% at current density of 350 mA/g and 1000 mAh/g at current density values up to 3.5 A/g (CE = 99%). The laminated graphene-based structure yields a protective coating to the silicon nanoparticles still enabling exposure to lithium ions. The method of production of the laminated silicon-graphene nanocomposite is scalable and low-cost, offering a practical route to the introduction of high silicon content anodes in lithium-ion batteries.

Nonlinear optical properties of polycrystalline silicon core fibers from telecom wavelengths into the mid-infrared spectral region

Abstract: Polycrystalline silicon core fibers (SCFs) fabricated via the molten core drawing (MCD) method are emerging as a flexible optoelectronic platform. Here, the optical transmission properties of MCD SCFs that have been tapered down to a few micrometer-sized core dimensions are characterized from the telecom band to the mid-infrared spectal regime. The SCFs exhibit low linear losses on the order of a few dB/cm over the entire wavelength range. Characterization of the two-photon absorption coefficient (βTPA) and nonlinear refractive index (n2) of the SCFs reveals values consistent with previous measurements of single crystal silicon materials, indicating the high optical quality of the polysilicon core material. The high nonlinear figure of merit obtained for wavelengths above 2 μm highlight the potential for these fibers to find application in infrared nonlinear photonics.

A polycrystalline-silicon dual-gate MOSFET-based 1T-DRAM using grain boundary-induced variable resistance

Abstract: A polycrystalline-silicon (poly-Si) dual-gate MOSFET-based one-transistor dynamic random-access memory (1T-DRAM) cell was developed using grain boundary (GB)-induced barrier effects. The program/erase operation of the 1T-DRAM is performed by trapping/detrapping charges in GB traps. The trapped charges cause variations in the grain energy barrier of the storage region, which forms the sensing margin of the 1T-DRAM. The proposed cell achieved a high sensing margin of 4.45 μA/μm and a long retention time (>100 ms) at a high temperature of 373 K (100 °C).

Ultraviolet detection properties of electrodeposited n-SnO2 modified p-Si nanowires hetero-junction photodiode

Abstract: Highly dense, vertically aligned silicon nanowires (SiNWs), having diameters in the range of 40–100 nm and length upto 5 µm, are grown by metal assisted chemical etching technique on p-type polycrystalline silicon (pc-Si) substrate The hetero-junction photodiodes, for ultraviolet sensing application, are fabricated by depositing tin oxide (n-SnO2) onto pc-Si and SiNWs on pc-Si surface, using simple and low cost electrochemical deposition technique The prepared SiNWs and n-SnO2 decorated SiNWs are examined by scanning electron microscopy and elemental dispersive analysis by X-ray Three photodiodes with device architectures Al/Ti/SiNWs/pc-Si/Ti/Al, Al/Ti/n-SnO2/pc-Si/Ti/Al and Al/Ti/n-SnO2/SiNWs/pc-Si/Ti/Al are fabricated and their UV sensing behavior is studied by recording their V–I characteristics under dark and UV-radiation The recorded V–I curves of the fabricated devices show diode like behavior and their rectification ratio, turn on voltage, effective barrier height and sensitivity are calculated and compared Under UV exposure, the V–I studies under forward and reverse biasing for the device Al/Ti/n-SnO2/SiNWs/pc-Si/Ti/Al shows significantly higher rectification ratio, sensitivity, responsivity and detectivity around 1723 at ± 9 V, 64, 03456 A/W at 5 V and 802869 × 1012 Jones respectively Further, the photo-resistive measurements of the device also show its excellent reproducible nature This better UV sensing behavior is also supported with proposed UV sensing mechanism under biasing conditions

A review and analysis of technologies applied in PV modules

Abstract: The implementation of photovoltaic (PV) systems as an alternative source of energy emerges in the electric sector. In this scenario, the challenge arises to present increasingly efficient solutions for PV conversion. As part of these solutions, several types of technology related to PV modules gain prominence in the scientific milieu and in the market dominated by monocrystalline and polycrystalline silicon technologies. Examples are half-cell, double glass, bifacial, PERC, HIT, amorphous silicon, CdTe (cadmium telluride) and CIGS (copper indium gallium selenide) that have the potential for innovation, however, they need to be studied and compared. In this instance, the purpose of this paper is to study the different types of technologies applied in PV modules, verifying the potential of PV conversion of each technology. To evaluate the potential of the technologies, the PV*SOL software was used, limiting an area for the installation of PV modules and simulating the different types of technologies in the limited area. The system with HIT modules presented the best relationship between generated energy and area. HIT technology still presents a high-cost market, meanwhile this technology is expected to be cost-effective in the coming years.

Development of sol-gel derived gahnite anti-reflection coating for augmenting the power conversion efficiency of polycrystalline silicon solar cells

Abstract: Abstract The present research is focused on developing ZnAl2O4 (gahnite) spinel as an antireflection coating material for enhanced energy conversion of polycrystalline silicon solar cells (PSSC). ZnAl2O4 has been synthesized using dual precursors, namely aluminum nitrate nonahydrate and zinc nitrate hexahydrate in ethanol media. Diethanolamine has been used as a sol stabilizer in sol-gel process for ZnAl2O4 nanosheet fabrication. ZnAl2O4 nanosheet was deposited layer-by-layer (LBL) on PSSC by spin coating method. The effect of ZnAl2O4 coating on the physical, electrical, optical properties and temperature distribution in PSSC was investigated. The synthesized antireflection coating (ARC) material bears gahnite (ZnAl2O4) spinel crystal structure composed of two dimensional (2D) nanosheets. An increase in layer thickness proves the LBL deposition of ARC on the PSSC substrate. The ZnAl2O4 2D nanosheet comprising ARC on the PSSC was tested and it exhibited a maximum of 93 % transmittance, short-circuit photocurrent of 42.364 mA/cm2 and maximum power conversion efficiency (PCE) 23.42 % at a low cell temperature (50.2 °C) for three-layer ARC, while the reference cell exhibited 33.518 mA/cm2, 15.74 % and 59.1 °C, respectively. Based on the results, ZnAl2O4 2D nanosheets have been proven as an appropriate ARC material for increasing the PCE of PSSC.

Deep Dry Etching of Silicon with Scallop Size Uniformly Larger than 300 nm

Abstract: High aspect ratio features in silicon have broad applications in micro-electro-mechanical systems, microfluidic control and advanced packaging This structure is usually fabricated by Bosch process, and the corresponding scallop should be controlled Obtaining large scallop size seems easier than that of small scallop, however, it is a big challenge to obtain uniform large scallop Herein, by using dry etching system, we demonstrate a novel high aspect ratio silicon trench with scallop size uniformly larger than 300 nm in both single crystal silicon and polycrystalline silicon Additionally, the difference between single crystal silicon etching and polycrystalline silicon etching is compared This work is beneficial to understanding the silicon etching mechanism in Bosch process and has potential applications in microelectronic and microfluidic devices

Molecular dynamics simulation of Si and SiO2 reactive ion etching by fluorine-rich ion species

Abstract: One of the most difficult challenges in the fabrication of three-dimensional (3D) NAND flash memory devices is high-aspect-ratio etching to make deep hole channels through a polycrystalline silicon (Si) (or silicon nitride) and silicon dioxide (SiO2) stacked layers. In this study, classical molecular dynamics (MD) simulation is performed to examine ion-surface interactions in reactive ion etching (RIE) of Si and SiO2 surfaces by C2F5+ and NF2+ ions with ion incident energy ranging from 500 eV to 2000 eV. These ions are selected for this study as sample cases where each incident ion contains a relatively large number of fluorine atoms, which enhance chemical etching of both Si and SiO2. Such highly reactive ions generated in a plasma are expected to etch through stacked Si and SiO2 layers with high etching yields. The etching yields obtained from MD simulation are found to be consistent with experimental results and highly dependent on the impact ion energy as well as the amount of fluorine involved in the etching process. The depth profile study has also shown that dense accumulation of F atoms on the surface formed during the ion bombardment significantly contributes to the bond breaking of surface atoms, which enhances the etching yields.

Amorphous Tin Oxide Applied to Solution Processed Thin-Film Transistors

Abstract: The limited choice of materials for large area electronics limits the expansion of applications. Polycrystalline silicon (poly-Si) and indium gallium zinc oxide (IGZO) lead to thin-film transistors (TFTs) with high field-effect mobilities (>10 cm2/Vs) and high current ON/OFF ratios (IOn/IOff > ~107). But they both require vacuum processing that needs high investments and maintenance costs. Also, IGZO is prone to the scarcity and price of Ga and In. Other oxide semiconductors require the use of at least two cations (commonly chosen among Ga, Sn, Zn, and In) in order to obtain the amorphous phase. To solve these problems, we demonstrated an amorphous oxide material made using one earth-abundant metal: amorphous tin oxide (a-SnOx). Through XPS, AFM, optical analysis, and Hall effect, we determined that a-SnOx is a transparent n-type oxide semiconductor, where the SnO2 phase is predominant over the SnO phase. Used as the active material in TFTs having a bottom-gate, top-contact structure, a high field-effect mobility of ~100 cm2/Vs and an IOn/IOff ratio of ~108 were achieved. The stability under 1 h of negative positive gate bias stress revealed a Vth shift smaller than 1 V.

Scaling Down Effect on Low Frequency Noise in Polycrystalline Silicon Thin-Film Transistors

Abstract: Scaling down effects on conduction and low frequency noise characteristics are investigated in a set of p-type polycrystalline silicon thin-film transistors (poly-Si TFTs) with fixed channel width ( $W=8 \mu$ m) and different channel lengths ( $L=2, 4, 8, 12, ~\text{and}~ 20 \mu$ m). First, short channel effects on threshold voltage, field effect mobility, and sub-threshold swing are examined, while the presence of contact may induce to the degradation of field effect mobility in the short channel devices. Subsequently, the drain current noise power spectral densities are measured at varied effective gate voltages and drain currents. The slopes of normalized noise against effective gate voltage are varied from −1.1 to −2 with decreasing channel length, which indicates that poly-Si TFTs varied from bulk dominated devices to interface dominated devices. Based on $\Delta N-\Delta \mu$ model, the flat-band voltage noise spectral density and coulomb scattering coefficient are extracted. Therefore, measured normalized noises are simulated by considering of contact resistance. Finally, short channel effects on some noise parameters (such as Hooge’s parameter, etc.) are studied and discussed.

A Renewal Weakest-Link Model of Strength Distribution of Polycrystalline Silicon MEMS Structures

Abstract: Experimental data have made it abundantly clear that the strength of polycrystalline silicon (poly-Si) microelectromechanical systems (MEMS) structures exhibits significant variability, which arises from the random distribution of the size and shape of sidewall defects created by the manufacturing process. Test data also indicated that the strength statistics of MEMS structures depends strongly on the structure size. Understanding the size effect on the strength distribution is of paramount importance if experimental data obtained using specimens of one size are to be used with confidence to predict the strength statistics of MEMS devices of other sizes. In this paper, we present a renewal weakest-link statistical model for the failure strength of poly-Si MEMS structures. The model takes into account the detailed statistical information of randomly distributed sidewall defects, including their geometry and spacing, in addition to the local random material strength. The large-size asymptotic behavior of the model is derived based on the stability postulate. Through the comparison with the measured strength distributions of MEMS specimens of different sizes, we show that the model is capable of capturing the size dependence of strength distribution. Based on the properties of simulated random stress field and random number of sidewall defects, a simplified method is developed for efficient computation of strength distribution of MEMS structures.

Fabrication of Monodisperse Colloids of Resonant Spherical Silicon Nanoparticles: Applications in Optical Trapping and Printing

Abstract: We present a new method for making monodisperse highly spherical polycrystalline silicon (Si) nanoparticles dispersed in solution and a method for trapping, moving, and printing these nanoparticles on a substrate. Spherical Si nanoparticles with low dispersion in size (<3.5%) and diameter of 130 and 210 nm were fabricated using combined hole-mask colloidal lithography and laser-induced transfer. The particles are highly crystalline and possess electric and magnetic dipole resonances in the visible spectrum varying with the diameter. They could be trapped in 2D against a substrate using an optical tweezer and then printed onto the substrate by means of radiation pressure. The proposed method paves the way for the use of optical forces for assembling complex resonant dielectric nanostructures with engineered optical properties.

Fabrication and characterization of polysilicon-on-insulator (PolySOI) and a-SOI based micro piezoresistive pressure sensor for harsh environment applications

Abstract: Micro sensors and actuators are widely used in this era. Micro pressure sensors are required in many applications and are the first sensors fabricated using MEMS technology. The work presents the fabrication of two micro pressure sensors viz., polysilicon on insulator (PolySOI) and amorphous silicon on insulator (a-SOI). Both sensors work on the principle of piezoresistive pressure sensing. The PolySOI sensor has a configuration Si-SiO2-polysilicon and the a-SOI sensor has Si-SiO2-a-silicon. The fabricated sensors consist of polysilicon and a-silicon piezoresistors. Nano-piezoresistors are patterned on the diaphragm to enhance the sensitivity and are connected in the form of a Wheatstone bridge. Both sensors are characterized for potential and sensitivity over a pressure range of 0–1 MPa. Two sensors exhibit high sensitivity, PolySOI sensor provides the sensitivity of 14.7 mV/bar (147 mV/MPa). Polycrystalline silicon is used as it has excellent mechanical properties and is compatible with high temperature processing and interfaces very well with thermally deposited SiO2. a-SOI sensor has a sensitivity of 10.5 mV/bar (105 mV/MPa). Both sensors are fabricated using conventional MEMS technology and with a silicon wafer. The sensors fabricated are alternate to the use of SOI wafer which is expensive and hard to customize.

Modeling and Simulation of Polycrystalline Silicon Photovoltaic Cells

Abstract: The smart grid system can be integrated from different sources of renewable energy, such as photovoltaic panels, built by a large number of solar cells. The aim of this work is to study the influence of the single-diode model parameters on the current-voltage and power-voltage characteristics of the polycrystalline silicon photovoltaic (PV) cells. These parameters are series resistance, shunt resistance, and ideality factor. In addition the influence of the illumination and the temperature is examined. It was found that, the simulation results are acceptable; the model confirms that it is in agreement with the PV panel behavior as given by the manufacturer.

Performance assessment of mono and poly crystalline silicon photovoltaic arrays under Pannonian climate conditions

Abstract: This paper conducted performance assessment of two photovoltaic arrays made of different silicon photovoltaic technologies installed at the test site of the Laboratory for Renewable Energy Sources at the Faculty of Electrical Engineering, Computer Science and Information Technology Osijek in Croatia. Each of the two photovoltaic arrays consists of 20 series-connected photovoltaic modules with total installed power of 5 kWp, which are then connected to the grid-tie inverter. Studied PV technologies are monocrystalline and polycrystalline silicon. Performance of the photovoltaic arrays is evaluated using 12 months of continuous measurements of the electrical output with assessment of the influence of European humid continental climate measured meteorological data on the performance, electricity production and efficiency of the investigated photovoltaic arrays. Monthly energy yield, performance ratio and capacity factor of each PV array is also calculated. Furthermore, empirical analysis of meteorological and electrical parameters is conducted and mathematical models of efficiency in relation to module temperature are determined.

Charge transport mechanism in low temperature polycrystalline silicon (LTPS) thin-film transistors

Abstract: Low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) are recently used in many display applications due to its high mobility and high stability. However, its processing at low temperature causes defects which affect charge carrier mobility. So, it is essential to completely understand the effects of defects on charge transport mechanism. In this paper, experimental results are presented to investigate the charge carrier mobility of LTPS device. Furthermore, based on the theoretical model, the charge transport characteristic for LTPS has been interpreted. Our results show that, at low gate voltage, the charge transport of LTPS TFT displays multiple trapping and release mechanism, while free charge carrier transport mechanism at high gate voltage.

With PECVD Deposited Poly-SiGe and Poly-Ge Forming Contacts Between MEMS and Electronics

Abstract: As a structural layer for microelectromechanical systems, in situ doped polycrystalline silicon germanium (poly-SiGe) can be deposited directly through openings of the uppermost dielectric onto the underlying metal interconnects to achieve electronic connections to the CMOS electronics. Differently from the existing works where poly-SiGe was deposited with the low pressure chemical vapor deposition (LPCVD), the plasma enhanced chemical vapor deposition (PECVD) method to produce poly-SiGe films forming the structural layer and the electrical contacts has been deployed. Compared with the films deposited with LPCVD, the as-deposited PECVD films formed contacts yielding low resistivity without any extra processing, such as precleaning and annealing. To investigate the contact resistance of poly-SiGe and polycrystalline germanium (poly-Ge) on titanium, Kelvin structures were fabricated and characterized. The substrate temperatures during the deposition were as low as 375°C for poly-SiGe and 340°C for poly-Ge, and low specific contact resistances of 3.2 × 10−6 Ω cm2 and 8.0 × 10−6 Ω cm2 respectively. This is expected to arise from the additionally acquired activation energies of ions from the plasma during PECVD. It is possibly due to the additional energies from the plasma, a titanium germanosilicide interfacial layer between poly-SiGe (or poly-Ge) and titanium (Ti) can be generated without high temperature processes. A metal stack was employed, to ensure a good adhesion, to block the diffusion and serve as an anti-reflection layer at the lithography.

Three-dimensional radial junction solar cell based on ordered silicon nanowires.

Abstract: Highly ordered silicon nanowires (SiNWs) were fabricated by nanoimprint lithography and Bosch etching methods. A polycrystalline silicon shell was grown to form a radial p-n junction. To enhance its anti-reflection properties and conductivity, a thin ITO layer was deposited on the SiNWs solar cell, then a micro-grid electrode was introduced to minimize the metal areas to maximize carrier collection. Finally, shorter nanowires were used to reduce surface recombination and achieve an efficiency of 10.5%. This work is expected to show some possible techniques to improve the performance of silicon nanostructure solar cell.

Hydrogen-Assisted Defect Engineering of Doped Poly-Si Films for Passivating Contact Solar Cells

Abstract: Hydrogen-assisted defect engineering, via a hydrogenated silicon nitride (SiNx:H) capping layer, on doped polycrystalline silicon (poly-Si) passivating-contact structures, is explored using complem...

Local contact passivated P-type crystalline silicon solar cell and preparation method thereof

Abstract: The invention relates to the technical field of solar cell preparation and in particular to a novel local contact passivated P-type crystalline silicon solar cell and a preparation method thereof. Thenovel local contact passivated P-type crystalline silicon solar cell comprises a substrate which is a P-type monocrystalline silicon wafer, wherein the front surface of the cell comprises an emitterwhich is pn junction region, and a local contact passivated tunneling silicon oxide/n-type doped polycrystalline silicon region; the local contact passivated tunneling silicon oxide/n-type doped polycrystalline silicon region is in contact with a metal electrode; the back side of the cell has a back passivation layer which is an aluminum oxide/silicon nitride laminate film; and the back side of the cell further has a sintered aluminum paste to form an aluminum back field. The cell of the invention, by using the selective carrier transport property of the tunneling silicon oxide/polycrystallinesilicon laminate film, realizes local contact passivation, thereby completely eliminating the metal region recombination while ensuring the ohmic contact of the metal electrode, and further greatly improving the conversion efficiency of the cell.

Characterization of absorption losses in rear side n-type polycrystalline silicon passivating contacts

Abstract: Passivating contacts consisting of polycrystalline silicon (poly-Si) and thin silicon-oxide (SiOx) layers facilitate a significant reduction of recombination losses in silicon solar cells. Nevertheless, these gains come with short circuit current density (Jsc) losses due to parasitic absorption by the poly-Si. Even if the passivating contacts are employed at the rear side only, absorption, particularly due to free carriers (FCA) in the heavily doped poly-Si, may still lead to significant Jsc losses. In this work, these losses are characterized as a function of the poly-Si thickness (tpoly) by the analysis of front reflectance spectra in the infrared (IR). For this study, two sets of samples with different n-type full-area poly-Si passivating contacts at the rear are compared to references with a phosphorus(P)-diffused back surface field (BSF) instead. For the two sets, Jsc losses with respect to the references (ΔJsc) are 0.10 mA/cm2 and 0.42 mA/cm2 per 100 nm thick poly-Si, respectively. The difference between the two values is studied by Hall measurements and interpreted to be due to the over three times as high free carrier concentration (ND,act) in the poly-Si layers of the second set of samples as the first set. On the other hand, lifetime measurements showed an excellent passivation yielding an implied open circuit voltage (iVoc) up to 736 mV only for the samples with the more heavily doped poly-Si, whereas iVoc of 683 mV was measured for the first set, which indicates a trade-off between absorption losses and passivation quality.

Laser crystallized low-loss polycrystalline silicon waveguides.

Abstract: We report the fabrication of low-loss, low temperature deposited polysilicon waveguides via laser crystallization. The process involves pre-patterning amorphous silicon films to confine the thermal energy during the crystallization phase, which helps to control the grain growth and reduce the heat transfer to the surrounding media, making it compatible with CMOS integration. Micro-Raman spectroscopy, Secco etching and X-ray diffraction measurements reveal the high crystalline quality of the processed waveguides with the formation of millimeter long crystal grains. Optical losses as low as 5.3 dB/cm have been measured, indicating their suitability for the development of high-density integrated circuits.