Showing papers on "Power semiconductor device published in 2007"

Gate Injection Transistor (GIT)—A Normally-Off AlGaN/GaN Power Transistor Using Conductivity Modulation

Abstract: We have developed a normally-off GaN-based transistor using conductivity modulation, which we call a gate injection transistor (GIT). This new device principle utilizes hole-injection from the p-AlGaN to the AlGaN/GaN heterojunction, which simultaneously increases the electron density in the channel, resulting in a dramatic increase of the drain current owing to the conductivity modulation. The fabricated GIT exhibits a threshold voltage of 1.0 V with a maximum drain current of 200 mA/mm, in which a forward gate voltage of up to 6 V can be applied. The obtained specific ON-state resistance (RON . A) and the OFF-state breakdown voltage (BV ds) are 2.6 mOmega . cm2 and 800 V, respectively. The developed GIT is advantageous for power switching applications.

A Bidirectional Isolated DC–DC Converter as a Core Circuit of the Next-Generation Medium-Voltage Power Conversion System

Abstract: This paper describes a bidirectional isolated dc-dc converter considered as a core circuit of 3.3-kV/6.6-kV high-power-density power conversion systems in the next generation. The dc-dc converter is intended to use power switching devices based on silicon carbide (SiC) and/or gallium nitride, which will be available on the market in the near future. A 350-V, 10-kW and 20 kHz dc-dc converter is designed, constructed and tested. It consists of two single-phase full-bridge converters with the latest trench-gate insulated gate bipolar transistors and a 20-kHz transformer with a nano-crystalline soft-magnetic material core and litz wires. The transformer plays an essential role in achieving galvanic isolation between the two full-bridge converters. The overall efficiency from the dc-input to dc-output terminals is accurately measured to be as high as 97%, excluding gate drive and control circuit losses from the whole loss. Moreover, loss analysis is carried out to estimate effectiveness in using SiC-based power switching devices. Loss analysis clarifies that the use of SiC-based power devices may bring a significant reduction in conducting and switching losses to the dc-dc converter. As a result, the overall efficiency may reach 99% or higher

Power Semiconductor Devices

Abstract: This invention generally relates to power semiconductor devices, and in particular to improved thyristor devices and circuits. The techniques we describe are particularly useful for so-called MOS-gated thyristors. We describe a thyristor comprising a plurality of power thyristor devices connected in parallel, each said thyristor device being operable at a device current which the device has an on-resistance with a positive temperature coefficient.

PWM Converter Power Density Barriers

Abstract: Power density of power electronic converters in different applications has roughly doubled every 10 years since 1970. Behind this trajectory was the continuous advancement of power semiconductor device technology allowing an increase of converter switching frequencies by a factor of 10 every decade. However, today's cooling concepts, and passive components and wire bond interconnection technologies could be major barriers for a continuation of this trend. For identifying and quantifying such technological barriers this paper investigates the volume of the cooling system and of the main passive components for the basic forms of power electronics energy conversion in dependency of the switching frequency and determines switching frequencies minimizing the total volume. The analysis is for 5 kW rated output power, high performance air cooling, advanced power semiconductors, and single systems in all cases. A power density limit of 28 kW/dm3@300 kHz is calculated for an isolated DC-DC converter considering only transformer, output inductor and heat sink volume. For single-phase AC-DC conversion a general limit of 35 kW/dm3 results from the DC link capacitor required for buffering the power fluctuating with twice the mains frequency. For a three-phase unity power factor PWM rectifier the limit is 45 kW/dm3@810 kHz just taking into account EMI filter and cooling system. For the sparse matrix converter the limiting components are the input EMI filter and the common mode output inductor; the power density limit is 71 kW/dm3@50 kHz when not considering the cooling system. The calculated power density limits highlight the major importance of broadening the scope of research in power electronics from traditional areas like converter topologies, and modulation and control concepts to cooling systems, high frequency electromagnetics, interconnection technology, multi-functional integration, packaging and multi-domain modeling and simulation to ensure further advancement of the field along the power density trajectory.

Comparison of 2.3-kV Medium-Voltage Multilevel Converters for Industrial Medium-Voltage Drives

Abstract: This paper compares the expense of power semiconductors and passive components of a (2.3 kV, 2.4 MVA) two-level, three-level neutral-point-clamped, three-level flying-capacitor, four-level flying-capacitor, and five-level series-connected H-bridge voltage source converter on the basis of the state-of-the-art 6.5-, 3.3-, 2.5-, and 1.7-kV insulated gate bipolar transistors for industrial medium-voltage drives. The power semiconductor losses, the loss distribution, the installed switch power, the design of flying capacitors, and the components of an sine filter for retrofit applications are considered.

A New Degradation Mechanism in High-Voltage SiC Power MOSFETs

Abstract: The phenomenon of recombination-induced stacking faults in high-voltage p-n diodes in SiC has been previously shown to increase the forward voltage drop due to reduction of minority carrier lifetime. In this paper, it has been shown that, for the first time, this effect is equally important in unipolar devices such as high-voltage MOSFETs. If the internal body diode is allowed to be forward biased during the operation of these devices, then the recombination-induced SFs will reduce the majority carrier conduction current and increase the leakage current in blocking mode. The effect is more noticeable in high-voltage devices where the drift layer is thick and is not expected to impact 600-1200-V devices.

Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology

Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.

Silicon Carbide Power MOSFET Model and Parameter Extraction Sequence

Abstract: A compact circuit simulator model is used to describe the performance of a 2-kV, 5-A 4-H silicon carbide (SiC) power DiMOSFET and to perform a detailed comparison with the performance of a widely used 400-V, 5-A Si power MOSFET. The model's channel current expressions are unique in that they include the channel regions at the corners of the square or hexagonal cells that turn on at lower gate voltages and the enhanced linear region transconductance due to diffusion in the nonuniformly doped channel. It is shown that the model accurately describes the static and dynamic performance of both the Si and SiC devices and that the diffusion-enhanced channel conductance is essential to describe the SiC DiMOSFET on-state characteristics. The detailed device comparisons reveal that both the on-state performance and switching performance at 25degC are similar between the 400-V Si and 2-kV SiC MOSFETs, with the exception that the SiC device requires twice the gate drive voltage. The main difference between the devices is that the SiC has a five times higher voltage rating without an increase in the specific on-resistance. At higher temperatures (above 100degC), the Si device has a severe reduction in conduction capability, whereas the SiC on-resistance is only minimally affected

Dithering Skip Modulation, Width and Dead Time Controllers in Highly Efficient DC-DC Converters for System-On-Chip Applications

Abstract: This paper proposes temperature-independent load sensor (LS), optimum width controller (OWC), optimum dead-time controller (ODC), and tri-mode operation to achieve high efficiency over an ultra-wide-load range. Higher power efficiency and wider loading current range require rethinking the control method for DC-DC converters. Therefore, a highly efficient tri-mode DC-DC converter is invented in this paper for system-on-chip (SoC) applications, which is switched to sleeping mode at very light load condition or to high-speed mode at heavy load condition. The efficiency improvement is upgraded by inserting new proposed dithering skip modulation (DSM) between conventional pulse-width modulation (PWM) and pulse-frequency modulation (PFM). In other words, an efficiency-improving DSM operation raises the efficiency drop because of transition from PWM to PFM. Importantly, DSM mode can dynamically skip the number of gate driving pulses, which is inverse proportional to load current. Simplistically and qualitatively stated, the novel load sensor automatically selects optimum modulation method and power MOSFET width to achieve high efficiency over a wide load range. Moreover, optimum power MOSFET turn-on and turn-off delays in synchronous rectifiers and reduced ground bounce can save much switching loss by current-mode dead-time controller. Experimental results show the tri-mode operation can have high efficiency about 90% over a wide load current range from 3 to 500 mA. Owing to the effective mitigation of the switching loss contributed by optimum power MOSFET width and reduction of conduction loss contributed by optimum dead-times, the novel width and dead-time controllers achieve high efficiency about 95% at heavy load condition and maintain the highly efficient performance to very light load current about 0.1 mA.

Modeling and Characterization of RF and Microwave Power FETs

Abstract: © Cambridge University Press 2007 and Cambridge University Press, 2009.This 2007 book is a comprehensive exposition of FET modeling, and is a must-have resource for seasoned professionals and new graduates in the RF and microwave power amplifier design and modeling community. In it, you will find descriptions of characterization and measurement techniques, analysis methods, and the simulator implementation, model verification and validation procedures that are needed to produce a transistor model that can be used with confidence by the circuit designer. Written by semiconductor industry professionals with many years' device modeling experience in LDMOS and III-V technologies, this was the first book to address the modeling requirements specific to high-power RF transistors. A technology-independent approach is described, addressing thermal effects, scaling issues, nonlinear modeling, and in-package matching networks. These are illustrated using the current market-leading high-power RF technology, LDMOS, as well as with III-V power devices.

RF power amplifier

Abstract: The RF power amplifier includes first and second amplifiers Q 1 and Q 2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q 1 and Q 2 are formed on one semiconductor chip. The first bias voltage Vg 1 of the amplifier Q 1 is set to be higher than the second bias voltage Vg 2 of the amplifier Q 2 so that the amplifier Q 1 is operational between Class B and AB, and Q 2 is operational in Class C. The first effective device size Wgq 1 of the amplifier Q 1 is intentionally set to be smaller than the second effective device size Wgq 2 of the amplifier Q 2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

High efficiency CMOS rectifier circuit with self-Vth-cancellation and power regulation functions for UHF RFIDs

Abstract: High efficiency CMOS rectifier circuit for UHF RFID applications has been developed The rectifier utilizes self Vth cancellation (SVC) scheme in which threshold voltage of MOSFETs is cancelled by applying gate bias voltage generated by output voltage of the rectifier itself Very simple circuit configuration and no power dissipation feature of the scheme enable excellent power conversion efficiency (PCE) especially in small RF input power conditions At higher RF input power conditions, PCE of the rectifier automatically decreases This is the built-in self-power-regulation function Proposed SVC CMOS rectifier has been fabricated with 035 mum CMOS process and the measured performance has been compared with other types of rectifiers The SVC CMOS rectifier achieves 29% PCE at -99 dBm RF input power condition This PCE is larger than ever reported rectifiers under the condition

Comprehensive Design of a Three-Phase Three-Switch Buck-Type PWM Rectifier

Abstract: A three-phase three-switch buck-type pulsewidth modulation rectifier is designed for telecom applications in this paper. The rectifier features a constant 400-V output voltage and 5-kW output power at the three-phase 400-V mains. The principle of operation and the calculation of the relative on-times of the power transistors are described. Based on analytical relationships the stresses of the active and passive components are determined and the accuracy of the given calculations is verified by digital simulations. Exemplarily, a 5-kW power converter is then designed based on the analytical expressions and on switching loss measurements from a hardware prototype constructed with insulated gate bipolar transistor/diode power modules. The loss distribution of the components, the total efficiency, and the junction temperatures of the semiconductors are then evaluated in dependency on the operating point. Finally, the trade-off between the selected switching frequency and the admissible power range for the realized design is shown and a total efficiency of 95.0% is measured on the hardware prototype, where an excellent agreement with the theoretically evaluated efficiency is shown

Comparisons of SiC MOSFET and Si IGBT Based Motor Drive Systems

Abstract: With the rapid development of silicon carbide (SiC) material quality, SiC power devices are gaining tremendous attentions in power electronics. In this paper, a SiC device based motor drive system is performed to provide a quantitative estimate of the system improvement. Two 60 kW motor drive systems based on SiC MOSFET/Schottky diode and Si IGBTs are designed. The power losses of the two inverters with sinusoidal pulse width modulation (SPWM) control are calculated analytically. By comparing the efficiencies, sizes and temperatures of the two designed systems, SiC device shows the superior advantages of smaller loss, better efficiency and smaller size in the same motor drive application.

Design of a 1-MHz LLC Resonant Converter Based on a DSP-Driven SOI Half-Bridge Power MOS Module

Abstract: In this paper, the design of a 1-MHz LLC resonant converter prototype is presented. Aiming to provide an integrated solution of the resonant converter, a half-bridge (HB) power metal oxide semiconductor (MOS) module employing silicon-on-insulator technology has been designed. Such a technology, which is suitable for high-voltage and high-frequency applications, allows enabling HB power MOSFET modules operating up to 3MHz with a rated voltage of 400V. The power device integrates the driving stages of the high-side and low-side switch along with a latch circuit used to implement over-voltage/over-current protection. The module has been designed to be driven by a digital signal processor device, which has been adopted to perform frequency modulation of the resonant converter. By this way, output voltage regulation against variations from light- to full-loaded conditions has been achieved. The issues related to the transformer design of the LLC resonant converter are discussed, too. Owing to the high switching frequency experienced by the converter, 3F4 ferrite cores have been selected for their low magnetic power losses between 0.5 and 3 MHz and core temperatures up to 120degC. The resonant converter has been designed to operate in an input voltage range of 300-400V with an output voltage of 12V and a maximum output power of 120W. Within these design specifications, a performance analysis of the LLC converter has been conducted, comparing the results obtained at the switching frequencies of 500kHz and 1MHz. A suitable model of the LLC resonant converter has been developed to aid the prototype design.

Shielded gate trench (SGT) MOSFET cells implemented with a schottky source contact

Abstract: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one active cell further includes a trenched source contact opened between the trenches wherein the trenched source contact opened through a source region into a body region for electrically connecting the source region to a source metal disposed on top of an insulation layer wherein a trench bottom surface of the trenched source contact further covered with a conductive material to function as an integrated Schottky barrier diode in said active cell. A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.

270 kVA Solid State Transformer Based on 10 kV SiC Power Devices

Abstract: With the advancement of semiconductor technology, solid state transformer (SST) with high voltage fast switching SiC power devices is becoming a valid option to replace the conventional transformers in power substation. In this paper, a 270 kVA solid state transformer based on 10 kV SiC power MOSFET has been proposed. The two stages of SST, five-level Vienna rectifier and five-level DC/DC converter are specifically designed and simulated in closed loop. The analysis of device losses is performed based on the device characteristics. A design of high frequency transformer is presented as well. The simulation results together with the loss analysis verify the functionality and feasibility of SST.

An Accurate, Continuous, and Lossless Self-Learning CMOS Current-Sensing Scheme for Inductor-Based DC-DC Converters

Abstract: Sensing current is a fundamental function in power supply circuits, especially as it generally applies to protection and feedback control. Emerging state-of-the-art switching supplies, in fact, are now exploring ways to use this sensed-current information to improve transient response, power efficiency, and compensation performance by appropriately self-adjusting, on the fly, frequency, inductor ripple current, switching configuration (e.g., synchronous to/from asynchronous), and other operating parameters. The discontinuous, non-integrated, and inaccurate nature of existing lossless current-sensing schemes, however, impedes their widespread adoption, and lossy solutions are not acceptable. Lossless, filter-based techniques are continuous, but inaccurate when integrated on-chip because of the inherent mismatches between the filter and the power inductor. The proposed GM-C filter-based, fully integrated current-sensing CMOS scheme circumvents this accuracy limitation by introducing a self-learning sequence to start-up and power-on-reset. During these seldom-occurring events, the gain and bandwidth of the internal filter are matched to the response of the power inductor and its equivalent series resistance (ESR), effectively measuring their values. A 0.5 mum CMOS realization of the proposed scheme was fabricated and applied to a current-mode buck switching supply, achieving overall DC and AC current-gain errors of 8% and 9%, respectively, at 0.8 A DC load and 0.2 A ripple currents for 3.5 muH-14 muH inductors with ESRs ranging from 48 mOmega to 384 mOmega (other lossless, state-of-the-art solutions achieve 20%-40% error, and only when the nominal specifications of the power MOSFET and/or inductor are known). Since the self-learning sequence is non-recurring, the power losses associated with the foregoing solution are minimal, translating to a 2.6% power efficiency savings when compared to the more traditional but accurate series-sense resistor (e.g., 50 mOmega) technique.

Wide band-gap power semiconductor devices

Abstract: The recent progress in the development of high-voltage SiC, GaN and diamond power devices is reviewed. Topics covered include the performance of various rectifiers and switches, material and process technologies of these wide band-gap semiconductor devices and future trends in device development and industrialisation.

650 V 3.1 mΩcm 2 GaN-based monolithic bidirectional switch using normally-off gate injection transistor

Abstract: We report a normally-off GaN-based monolithic bidirectional switch for the first time. The switch consists of a double-gate AlGaN/GaN gate injection transistor (GIT) which serves normally-off operation with high drain current utilizing the hole injection from the p-type gate. The fabricated bidirectional switch exhibits high breakdown voltage of 650 V for both polarities and low on-state resistance (Ron .A) of 3.1 mΩcm2 . The GaN-based bidirectional switch can be applied to AC-AC matrix converters with high efficiency.

Power Semiconductor Devices for Hybrid, Electric, and Fuel Cell Vehicles

Abstract: Power semiconductor devices are key components in all power electronic systems, particularly in hybrid, electric, and fuel cell vehicles. This paper reviews the system requirement and latest development of power semiconductor devices including IGBTs, freewheeling diodes, and advanced power module technology in relating to electric vehicle applications. State-of-the-art silicon device technologies, their future trends, and theoretical limits are discussed. Emerging wide bandgap semiconductor devices such as SiC devices and their potential applications in electric vehicles are also reviewed

SThM Temperature Mapping and Nonlinear Thermal Resistance Evolution With Bias on AlGaN/GaN HEMT Devices

Abstract: Channel temperature has a strong impact on the performance of a microwave power transistor. In particular, it has a strong influence on the power gain, energetic efficiency, and reliability of the device. The thermal optimization of device geometry is therefore a key issue, together with precise measurements of temperature within the channel area. In this paper, we have used scanning thermal microscopy to perform temperature mapping, at variable dc bias points, on an AlGaN/GaN high-electron mobility transistor made on epilayers grown on silicon carbide substrate. We have analyzed the variation of the thermal resistance values, which are deduced from these measurements, with bias conditions VGS and VDS. The observed nonlinear behavior is found to be in excellent agreement with physical simulations, strongly pointing out the large variability of the extension of the dissipation area with the dc bias conditions

Method and apparatus for monitoring the condition of a battery by measuring its internal resistance

Abstract: A method for evaluating the condition of a battery comprises coupling a first power transistor as or as part of a first external load in series with the battery, coupling a second power transistor as or as part of a second external load in series with the battery, and conducting each power transistor to draw a transient large current from the battery while sampling the voltage across the battery and voltage across the load, from which the internal resistance of the battery can be determined. The internal resistance of the battery can then be compared with a predetermined nominal value to issue a warning if the battery is weak. The invention enables, for example, a driver to correctly know the actual condition of an automobile battery in substantially real time while consuming a minimum amount of power.

Enhancing schottky breakdown voltage (bv) without affecting an integrated mosfet-schottky device layout

Abstract: This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells Each of said power transistor cells has a planar Schottky diode that includes a Schottky junction barrier metal covering areas above gaps between separated body regions between two adjacent power transistor cells The separated body regions further provide a function of adjusting a leakage current of said Schottky diode in each of said power transistor cells Each of the planar Schottky diodes further includes a Shannon implant region disposed in a gap between the separated body regions of two adjacent power transistor cells for further adjusting a leakage current of said Schottky diode Each of the power transistor cells further includes heavy body doped regions in the separated body regions next to source regions surrounding said Schottky diode forming a junction barrier Schottky (JBS) pocket region

Advanced BCD technology for automotive, audio and power applications

Abstract: NXP’s family of SOI-based advanced bipolar CMOS DMOS (A-BCD) technologies is presented. The technology is very successful in automotive, audio and power applications. This paper introduces the technology, the device concepts and the applications. The advantage of BCD technology on SOI is in the ability to have all devices fully dielectrically isolated. This enables various device-biasing conditions (like high side or below substrate voltage), which are not easy to realise on bulk. This creates competitive advantage in the mentioned applications. As an example this enables extreme robust EMC (electro magnetic compatibility) and EMI (electro magnetic immunity) circuitry for CAN (controlled area network), or LIN (local interconnect network) transceivers in automotive. The leakage currents of the devices are much lower compared to bulk. The same holds for parasitic capacitances towards the substrate. LIGBT’s can be built without suffering from minority carriers being injected into the substrate. The area of power devices is in general very small due to the usage of the double Resurf principle and trench isolation. This small area pays off for high voltage analogue circuits. Special topics on self-heating and ESD are being treated, where it is demonstrated that performance is comparable to bulk. Three applications where SOI based BCD generates a functionality advantage, are being explained. The SOI based technology is an excellent starting point for development of future products were monolithic solutions can be built with embedded power or even embedded MEMs technology.

A Novel Four-Level Voltage Source Inverter—Influence of Switching Strategies on the Distribution of Power Losses

Abstract: In this paper, a novel four-level inverter will be presented and analyzed. The proposed inverter topology, which is composed of a conventional two-level and a three-level neutral-point clamped (NPC) inverter, is suitable for high-voltage and high-power applications. The proposed inverter, when it is compared with the conventional four-level NPC pulsewidth modulation inverter, exhibits the following advantages: a) ability of changing the power losses distribution profile among the devices by selecting a suitable switching strategy; b) reduction of total inverter power semiconductor device losses; c) ability of bidirectional operation for all power semiconductor switches; and d) easy implementation using existing power semiconductor modules. The effect of conduction and switching losses profiles of the proposed inverter for different switching strategies is examined under different loads, power factors, and modulation indices. The dc-link capacitors voltages are effectively balanced via a proposed self-voltage balancing topology, without the need of isolated dc voltage sources or additional voltage stabilizing circuits. Finally, the theoretical results are confirmed by simulation and experimental results

A 1-kV 4H-SiC Power DMOSFET Optimized for Low on -Resistance

Abstract: In this paper we describe a low-voltage (~1 kV) short-channel 4H-SiC power DMOSFET with several structural modifications to reduce the specific on-resistance. These include the following: 1) a heavily doped n-type current-spreading layer beneath the p-base; 2) a heavily-doped JFET region with narrow ( ~1 mum) JFET width; 3) a ldquosegmentedrdquo base contact layout; and 4) tighter alignment tolerances to reduce cell pitch. The design is optimized using computer simulations, and the resulting devices are fabricated and characterized. The fabricated device exhibits a specific on-resistance of 6.95 mOmega-cm2, which is one of the lowest yet reported on-resistances for a power MOSFET in this voltage range.

Narrow Pulse Elimination PWM for Multilevel Digital Audio Power Amplifiers Using Two Cascaded H-Bridges as a Nine-Level Converter

Abstract: This paper presents a methodology to reduce total harmonic distortion (THD) in digital audio power amplifiers, using two new approaches: 1) a multilevel converter made of two cascaded full-bridges, with suitable power supplies to operate as a nine-level hybrid type converter and 2) a new pulsewidth modulation (PWM) technique called narrow pulse elimination (NPE) PWM. The proposed nine-level converter uses only eight MOSFETs. Unlike conventional PWM, the NPE PWM does not generate excessively narrow pulses, so that power semiconductors nonideal delays and switching times are still negligible. Therefore, the nine-level output voltage THD, mostly introduced in the power stage, is strongly reduced. With the NPE technique, the resolution of the generated PWM is no longer limited by the switching speed of the output switches, but only by the frequency of digital processing circuit. Simulation and experimental results from a laboratory prototype are presented in order to show the effectiveness of the proposed approaches

A 12-Pulse AC–DC Rectifier With High-Quality Input/Output Waveforms

Abstract: This paper describes an ac-dc rectifier, which draws sinusoidal current waveforms from the utility. Also, it can supply either a ripple-free current or voltage to the dc load by using a dc filter. The technology involves an accurate shaping of the dc current by using two forced-commutated switches (IGBTs). The shaping of the dc current is reflected back into the shaping of the input currents, which become pure sine waves. The resulting system is reliable and able to handle rapid load variations with a simple and robust control system. It also operates under rectification and inversion. Detailed analysis and a complete set of experimental results from a 380-V 20-kVA rectifier system are provided.

Design and Analysis of a 270kW Five-level DC/DC Converter for Solid State Transformer Using 10kV SiC Power Devices

Abstract: Enabled by high voltage fast switching SiC devices, solid state transformers (SST) are being considered as a feasible application and a major step forward compared with conventional power transformers. One of the key components for the SST is a high voltage high frequency DC/DC converter. To reduce size and weight of this DC/DC converter, high frequency operation is desired hence it requires high voltage fast switching power devices like SiC MOSFETs. Due to the high frequency used, there is still significant amount of losses in the SiC MOSFETs and PIN diodes. In this paper, a five-level DC/DC converter is proposed based on the concept of three-level DC/DC converter with a flying capacitor. A key characteristic of this DC/DC converter is that it allows soft-switching turn-on operation for the SiC power MOSFETs, hence eliminating a major loss component for the SiC devices. This topology-related ZVS capability, coupled with superior conduction and switching performance of SiC MOSFETs and PIN diodes, facilitates the selection of 20 kHz switching frequency as the target frequency for a high power SST application.