Showing papers on "Power MOSFET published in 2010"

Snubberless Bidirectional DC–DC Converter With New CLLC Resonant Tank Featuring Minimized Switching Loss

Abstract: A bidirectional DC-DC converter (BDC) with a new CLLC-type resonant tank, which features zero-voltage switching (ZVS) for the input inverting choppers and zero-current switching (ZCS) for the output rectifier switches, regardless of the direction of the power flow, is proposed in this paper. Possessing the very optimal ZVS +ZCS soft-switching feature, this proposed converter will have a minimized switching loss if all of the main switches are implemented with metal-oxide-semiconductor field-effect transistors, and thereby, the proposed converter is fully soft switched and totally snubberless. The detail operation principles, as well as the design considerations, are presented. The methodologies to develop a unidirectional ZVS+ZCS dc-dc converter for the corresponding pulsewidth modulation and frequency modulation converters are proposed. The approach on how to construct a fully soft-switched BDC has also been proposed and analyzed. Finally, a topology extension is made, and another fully soft-switched BDC is derived. A prototype, which interfaces the 400-48-V dc buses for the uninterrupted power supply system with a power rating of 500 VA, was developed to verify the validity and applicability of this proposed converter. The highest applicable conversion efficiencies for the bidirectional operational modes are exceeding 96%.

High-Efficiency Isolated Boost DC–DC Converter for High-Power Low-Voltage Fuel-Cell Applications

Abstract: A new design approach achieving very high conversion efficiency in low-voltage high-power isolated boost dc-dc converters is presented. The transformer eddy-current and proximity effects are analyzed, demonstrating that an extensive interleaving of primary and secondary windings is needed to avoid high winding losses. The analysis of transformer leakage inductance reveals that extremely low leakage inductance can be achieved, allowing stored energy to be dissipated. Power MOSFETs fully rated for repetitive avalanches allow primary-side voltage clamp circuits to be eliminated. The oversizing of the primary-switch voltage rating can thus be avoided, significantly reducing switch-conduction losses. Finally, silicon carbide rectifying diodes allow fast diode turn-off, further reducing losses. Detailed test results from a 1.5-kW full-bridge boost dc-dc converter verify the theoretical analysis and demonstrate very high conversion efficiency. The efficiency at minimum input voltage and maximum power is 96.8%. The maximum efficiency of the proposed converter is 98%.

An Insight into the Switching Process of Power MOSFETs: An Improved Analytical Losses Model

Abstract: The piecewise linear model has traditionally been used to calculate switching losses in switching mode power supplies due to its simplicity and good performance. However, the use of the latest low voltage power MOSFET generations and the continuously increasing range of switching frequencies have made it necessary to review this model to account for the parasitic inductances that it does not include. This paper presents a complete analytical switching loss model for power MOSFETs in low voltage switching converters that includes the most relevant parasitic elements. It clarifies the switching process, providing information about how these parasitics, especially the inductances, determine switching losses and hence the final converter efficiency. The analysis presented in this paper yields two different types of possible switching situations: capacitance-limited switching and inductance-limited switching. This paper shows that, while the piecewise linear model may be applied in the former, the proposed model is more accurate for the latter. Carefully-obtained experimental results, described in detail, support the analytical results presented.

SiC Power Devices for Microgrids

Abstract: Microgrids with distributed generation sources are critical for reduction of greenhouse gas emissions and imported energy. However, power converters and circuit breakers built with silicon (Si) switches are too bulky and inefficient to be used in the microgrid system. The development of high-voltage power devices based on silicon carbide (SiC) will be a critical component in building the microgrid with distributed and fluctuating sources of power generation. In this paper, the physics and technology of high-voltage (>10 kV) 4H-SiC power devices, namely MOSFETs and insulated gate bipolar transistors are discussed. A detailed review of the current status and future trends in these devices is given with respect to materials growth, device design, and fabrication processing.

Advanced Power MOSFET Concepts

Abstract: D-MOSFET Structure.- U-MOSFET Structure.- SC-MOSFET Structure.- CC-MOSFET Structure.- GD-MOSFET Structure.- SJ-MOSFET Structure.- Integral Diode.- SiC Planar MOSFET Structures.- Synopsis.

Interleaved Triangular Current Mode (TCM) resonant transition, single phase PFC rectifier with high efficiency and high power density

Abstract: This paper presents a new topology for a highly compact and highly efficient single-phase Power Factor Corrected (PFC) rectifier system. The new topology consists of several interleaved boost stages which operate in a mode called Triangular Current Mode (TCM) in order to simultaneously achieve a high power density as well as a high efficiency. Applying TCM, ZVS is achieved over the full mains period by proper control of the power MOSFETs. The high TCM inductor current ripple is not transferred to the mains as the superposition of all boost cell input currents results in a smooth mains current waveform. Furthermore, one bridge leg operates synchronously to the mains frequency and connects the mains directly to an output rail. This results in very low common mode noise and only a small common mode filter has to be considered. The excellent behavior of this topology also applies to inverter operation.

A Resonant Gate-Drive Circuit Capable of High-Frequency and High-Efficiency Operation

Abstract: This paper deals with a new resonant gate-drive circuit for power MOSFETs. The proposed gate-drive circuit is characterized by a resonant inductor connected in series with the gate terminal of the driven MOSFET. The inductor and the input capacitance of the MOSFET form a series resonant circuit, which enables to charge or discharge the gate-to-source input capacitance of the MOSFET without any electric power consumption in theory. Experimental results are shown to verify the viability of the resonant gate-drive circuit. As a result, the proposed resonant gate-drive circuit reduces its power consumption by a factor of ten, compared with a conventional one. A 360-kHz and 1-kW MOSFET inverter driven by the proposed gate-drive circuits exhibits a high efficiency more than 99%, considering the losses in the two main MOSFETs and the two resonant gate-drive circuits.

Recent advances in silicon carbide MOSFET power devices

Abstract: Emerging silicon carbide (SiC) MOSFET power devices promise to displace silicon IGBTs from the majority of challenging power electronics applications by enabling superior efficiency and power density, as well as capability to operate at higher temperatures. This paper reports on the recent progress in development of 1200V SiC power MOSFETs. Two different chip sizes were fabricated and tested: 15A (0.225cm×0.45cm) and 30A (0.45cm×0.45cm) devices. First, the 30A MOSFETs were packaged as discrete components and static and switching measurements were performed. The device blocking voltage was 1200V and typical on-resistance was less than 50 mΩ with gate-source voltages of 0V and 20V, respectively. The total switching losses were 0.6 mJ, over five times lower than the competing devices. Next, a buck converter was built for evaluating long-term stability of the MOSFETs and typical switching waveforms are presented. Finally, the 15A MOSFETs were used for fabrication of 150A all-SiC modules. The module on-resistance values were in the range of 10 mQ, resulting in the best-in-class on-state voltage values of 1.5V at nominal current. The module switching losses were 2.3 mJ during turn-on and 1 mJ during turn-off, also significantly better than competing designs. The results validate performance advantages of the SiC MOSFETs, moving them a step closer to power electronics applications.

Investigation of 1.2 kV SiC MOSFET for high frequency high power applications

Abstract: SiC is among the most promising materials for next generation power electronic devices due to its superior physical properties to Si and relative mature technology. SiC MOSFET is expected to offer performance improvement over Si counterpart. This paper presents the characterization of 1.2 kV SiC MOSFET, including its static and dynamic characteristics, and its high-frequency (1 MHz), high-power (1.2 kW) zero-voltage switching (ZVS) operation in a half-bridge parallel resonant converter. In comparison with SiC JFET and Si CoolMOS, the advantages and disadvantages of the SiC MOSFET are summarized.

Interface degradation of Al heavy wire bonds on power semiconductors during active power cycling measured by the shear test

Abstract: Wire bonding is still the dominant interconnection technology for power semiconductors in power modules, e.g. for automotive or photovoltaic applications. In the past, many research activities have occurred in the field of reliability of power modules, where the life time of the complete module is affected by bond wire lift offs, heel cracks and other failures. Less effort was spent for investigating the degradation process at the wire bond itself. This paper addresses a new approach and focuses on the investigation of the cracks in the interface region between the die and the wire by using the shear test. These cracks form after several thousand temperature swings due to CTE mismatch and ultimately lead to wire bond lift off. New results of active power cycling with different temperature amplitudes and medium temperatures will be discussed. Shear tests have been carried out in regular intervals to monitor the degradation of the 400 μm wire bonds on power MOS-FETs. It was found out that the rate of the shear force reduction was mostly dependent on the amplitude of the temperature cycling. A significant effect of different medium temperatures could not be identified. These results will contribute to the development of an enhanced life time model for heavy wire bonds on power semiconductors.

Silicon-on-insulator-based high-voltage, high-temperature integrated circuit gate driver for silicon carbide-based power field effect transistors

Abstract: Silicon carbide (SiC)-based field effect transistors (FETs) are gaining popularity as switching elements in power electronic circuits designed for high-temperature environments like hybrid electric vehicle, aircraft, well logging, geothermal power generation etc. Like any other power switches, SiC-based power devices also need gate driver circuits to interface them with the logic units. The placement of the gate driver circuit next to the power switch is optimal for minimising system complexity. Successful operation of the gate driver circuit in a harsh environment, especially with minimal or no heat sink and without liquid cooling, can increase the power-to-volume ratio as well as the power-to-weight ratio for power conversion modules such as a DC-DC converter, inverter etc. A silicon-on-insulator (SOI)-based high-voltage, high-temperature integrated circuit (IC) gate driver for SiC power FETs has been designed and fabricated using a commercially available 0.8--m, 2-poly and 3-metal bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide semiconductor (DMOS) process. The prototype circuit-s maximum gate drive supply can be 40-V with peak 2.3-A sourcing/sinking current driving capability. Owing to the wide driving range, this gate driver IC can be used to drive a wide variety of SiC FET switches (both normally OFF metal oxide semiconductor field effect transistormore » (MOSFET) and normally ON junction field effect transistor (JFET)). The switching frequency is 20-kHz and the duty cycle can be varied from 0 to 100-. The circuit has been successfully tested with SiC power MOSFETs and JFETs without any heat sink and cooling mechanism. During these tests, SiC switches were kept at room temperature and ambient temperature of the driver circuit was increased to 200-C. The circuit underwent numerous temperature cycles with negligible performance degradation.« less

HiSIM-HV: A Compact Model for Simulation of High-Voltage MOSFET Circuits

Abstract: The completely surface-potential-based MOSFET model HiSIM-HV for high-voltage applications of up to several hundred volts is reviewed, and recently developed new model capabilities are presented. HiSIM-HV enables a consistent evaluation of current and capacitance characteristics for symmetric and asymmetric high-voltage MOSFETs due to a consistent description of the potential distribution across the MOSFET channel as well as the resistive drift regions. The anomalous features, often observed in the capacitances, are explained by large potential drops in the drift regions. Accurate modeling of the overlap region between the gate and drift region is also demonstrated. Different device features based on different device structures are well explained by the geometrical differences.

Performance, Reliability, and Robustness of 4H-SiC Power DMOSFETs

Abstract: In this paper, we review the performance, reliability, and robustness of the current 4H-SiC power DMOSFETs. Due to advances in device and materials technology, high power, large area 4H-SiC power DMOSFETs (1200 V, 67 A and 3000 V, 30 A) can be fabricated with reasonable yields. The availability of large area devices has enabled the demonstration of the first MW class, all SiC power modules. Evaluations of 1200 V 4H-SiC DMOSFETs showed that the devices offer avalanche power exceeding those of commercially available silicon power MOSFETs, and have the sufficient short circuit robustness required in most motor drive applications. A recent TDDB study showed that the gate oxides in 4H-SiC MOSFETs have good reliability, with a 100-year lifetime at 375oC if Eox is limited to 3.9 MV/cm. Future work on MOS reliability should be focused on Vth shifts, instead of catastrophic failures of gate oxides.

SiC technologies for future energy electronics

Abstract: High-efficiency electric power conversion is an essential technology for energy saving. The efficiency of power converters/inverters relies on the performance of power semiconductor devices employed in the power electronic systems. Silicon carbide (SiC) is a newly-emerging wide bandgap semiconductor, by which high-voltage, low-loss power devices can be realized owing to its superior properties. This paper reviews recent progress in SiC material and device technologies for power device applications. Benefits and remaining issues of SiC power devices are highlighted.

Power MOSFET and Its Edge Termination

Abstract: Improved MOSFET structures and processes, where multiple polysilicon embedded regions are introduced into the n+ source contact area. A top poly Field Plate is used to shield the electric field from penetrating into the channel, so that a very short channel can be used without jeopardizing the device drain-source leakage current. A bottom poly Field Plate is used to modulate the electric field distribution in the drift region such that a more uniform field distribution can be obtained.

Modeling power semiconductor losses in HEV powertrains using Si and SiC devices

Abstract: Silicon carbide (SiC) power semiconductor devices are known to have potential benefits over conventional silicon (Si) devices, particularly in high power applications such as hybrid electric vehicles (HEVs). Recent literature studying the use of SiC JFETs in HEV inverters indicate a substantially increased gas mileage. This paper further investigates this change in inverter efficiency due to the adoption of SiC using analytical loss models and empirical loss data obtained from experimental Cree 1200V 10A DMOSFETs and Schottky diodes. A motor inverter efficiency map is developed and used in the VEHLIB simulator to evaluate fuel consumption benefits. Distribution of conduction and switching losses in both Si and SiC inverters is explored.

Power Management of Wideband Code Division Multiple Access RF Power Amplifiers With Antenna Mismatch

Abstract: This paper focuses on a combination of adaptive power supply and adaptive impedance tuning for WCDMA RF power amplifiers (RFPA) in wireless handsets in order to improve the system efficiency under different transmit power levels and antenna mismatch. The adaptive power supply is a noninverting buck-boost power converter. It is shown that precise output voltage positioning and low output voltage ripple over a wide output voltage range, including buck, boost, and buck/boost transition modes, can be accomplished using ?-? modulation in combination with a small, low-resolution DPWM core. A two-mode digital controller is presented, in which the compensator parameters are changed upon buck/boost mode transitions in order to improve closed-loop dynamic performance. Furthermore, improvements in system efficiency are demonstrated using this adaptive power supply combined with an adaptive RF impedance tuner between the RFPA and the antenna. The results are verified on an experimental test bed that consists of a discrete RFPA, impedance tuner, a prototype 0.5 ?m CMOS power stage IC that integrates power MOSFETs, drivers and deadtime control logic, and a digital power management controller implemented on an FPGA.

Adaptive dv/dt and di/dt control for isolated gate power devices

Abstract: This paper describes an adaptive gate control technique and a driver concept for isolated gate power devices. The proposed technique modulates the gate current of the power devices to control dv/dt and di/dt during a switching transition. It uses different time intervals, which are adjusted successively. Delays of the driver and the control section are compensated and therefore the proposed technique is applicable to control fast switching transients. To detect the di/dt during switching, a feedback path is implemented using parasitic inductances in the power section of the converter. By application of this method, we achieved the following properties: low propagation delays, reduced voltage overshoots, improved EMI and reduced switching power losses. The proposed method is applicable to converters with half-bridge, full-bridge and three-phase bridge configuration.

Power supply device

Abstract: A step down type DC-DC power-supply device implements both the stabilization of the control loop and the responsibility at the same time. In the power-supply device, an output power signal is fed back to an error amplifier after having passed through a CR smoothing filter provided independently of a power LC smoothing filter. Also, independently of the duty controls over Power MOSFETs, i.e., upper-side/lower-side semiconductor switching components in the steady state, an output from the power LC smoothing filter is added to an upper and lower limit-mode-equipped control circuit, thereby, at the transient state, forcefully setting the duty α at either 0% or 100%.

One-step digital dead-time correction for DC-DC converters

Abstract: This paper introduces a novel one-step digital control technique that can dynamically optimize the dead-times for the turn-on and turn-off of the power MOSFETs in DC-DC converters. A NOR gate and a delay-line circuit are used to detect and measure the duration of the unwanted low-side MOSFET body-diode conduction. Based on this measurement, the optimum dead-time is calculated on-the-fly and the DPWM controller will respond immediately to maximize the conversion efficiency in the next switching cycle. This approach is well suited for digital IC implementation. Experimental results from a digitally controlled 6V to 1V, 10A synchronous buck converter verified the efficiency improvement and the practical implementation of the proposed one-step dead-time correction algorithm. This one-step dead-time correction can improve the converter's efficiency by 2 to 4%, depending on output current, output voltage and switching frequency.

SAR-Controlled Adaptive Off-Time Technique Without Sensing Resistor for Achieving High Efficiency and Accuracy LED Lighting System

Abstract: A successive approximation register (SAR) is utilized to control adaptive off-time in order to regulate accurate light-emitting diode (LED) current and improve efficiency of LED driver. The proposed SAR-controlled adaptive off-time technique without the external sensing resistor can sense the current flowing through LEDs during the turning on of the N-type power MOSFET, as well as provide adaptive off-time depending on the input voltage and the numbers of LED, to obtain an accurate LED current. Experimental results show the inductor current ripple is kept within ±15% of the DC current. As a result, line regulation is guaranteed in this proposed design.

Solid-State LTD Module Using Power MOSFETs

Abstract: It is proposed that linear transformer driver (LTD) concept can be applied to compact repetitive pulsed-power generation. For experimental demonstration, a table-top LTD module has been constructed by using power metal-oxide-semiconductor field-effect transistors (MOSFETs) and film capacitors. It consists of 24 basic circuits and a magnetic core, contained in a cavity case having a diameter of 32 cm and a height of 1.1 cm. All MOSFETs can be turned on and off synchronously, controlled by a single optic fiber. This LTD module has been tested with operation voltage of 900 V for single shot and 700 V for repetitive operation at 500 Hz. Near-rectangle waveforms were obtained on a resistive load of 3.2n , with pulsewidth of 200 ns, rise time of 20 ns, and fall time of 40 ns. The overall system efficiency was obtained to be 76%.

Gate Enhanced Power UMOSFET With Ultralow On-Resistance

Abstract: Gate enhanced power UMOSFET (GE-UMOS) is proposed to decrease the specific on -resistance of the device. The key feature of this structure is that the deep trench polysilicon electrode is contacted to the gate electrode, maintaining the breakdown voltage and forming the high electron current density at side n-drift region, thus resulting in a lower on -resistance compared to the superjunction structure and gradient oxide-bypassed (GOB) structure. Furthermore, the performance of GE-UMOS is proved by comparing with the GOB-UMOS structure.

A Stepped Oxide Hetero-Material Gate Trench Power MOSFET for Improved Performance

Abstract: In this work, we propose a new Stepped Oxide Hetero-Material Trench (SOHMT) power MOSFET with three sections in the trench gate (an N+ poly gate sandwiched between two P+ poly gates) and having different gate oxide thicknesses (increasing from source side to drain side). The different gate oxide thickness serves the purpose of simultaneously achieving (i) a good gate control on the channel charge and (ii) a lesser gate to drain capacitance. As a result, we obtain higher transconductance as well as reduced switching delays, making the proposed device suitable for both RF amplification and high speed switching applications. In addition, the sandwiched gate with different work function gate materials modifies the electric field profile in the channel resulting in an improved breakdown voltage. Using two-dimensional simulations, we have shown that the proposed device structure exhibits about 32% enhancement in breakdown voltage, 25% reduction in switching delays, 20% enhancement in peak transconductance and 10% reduction in figure of merit (product of ON-resistance and gate charge) as compared to the conventional trench gate MOSFET.

A System-in-Package (SiP) With Mounted Input Capacitors for Reduced Parasitic Inductances in a Voltage Regulator

Abstract: This paper presents a system-in-package (SiP) that mounts an input capacitor for voltage regulators. The SiP has a low power loss of 3.8 W at a switching frequency of 1 MHz, input voltage of 12 V, and output current of 25 A. The parasitic inductance of this SiP is 56% that of the previously reported SiP, which had the input capacitor mounted on the printed circuit board, and this reduction is due to the short current loop from the input capacitor to the MOSFETs. As a result, the power loss can be reduced by 20% for the same spike voltage. The high-side MOSFET die is flipped so that the drain electrode faces up, facilitating the connection of the drain electrode of the high-side MOSFET and the source electrode of the low-side MOSFET to the mounted input capacitor. The authors also propose a way to estimate the parasitic inductance experimentally, not from a current measurement such as with a shunt resistor and a current probe, but from the ringing frequency when the high-side MOSFET is switched and the output capacitance C oss of the MOSFET being on the off state.

Low voltage TrenchMOS combining low specific R DS(on) and Q G FOM

Abstract: The combination of low specific on-resistance, Sp.R DS(on ), and low gate charge, Q G and Q GD , has been achieved by applying a superjunction approach to an n-type 30V vertical trench power MOSFET structure. Whereas lateral technologies have low Q G and Q GD figures of merit with poor Sp.R DS(on ) (due to cell pitch limitations) and split-gate RSO structures have excellent Sp.R DS(on) and Q GD FOM at the expense of the Q G FOM (due to creation of additional C GS ), the superjunction structure has been shown to be achieving benchmark performance in all three of these performance indicators simultaneously. For a 30V rated device, specific on-state resistances of 3.9mOmm2 (V GS =10V) and 6.5mΩmm2 (V GS =4.5V) have been demonstrated along with switching figures of merit as low as 22.7mΩnC (RDS(on)×QG) and 4.6mΩnC (R D S(on)×QGD). The result is a technology that combines the best aspects of both vertical trench and lateral power MOSFET structures.

A High-Dynamic Range Current Source Gate Driver for Switching-Loss Reduction of High-Side Switch in Buck Converter

Abstract: In this letter, a high-dynamic range current source gate driver (HD-CSD) circuit is proposed to reduce the switching loss of the high-side switch in buck converter with wide variation of the gate resistance. Hard switching loss is the major loss in high-side switch and limits the high switching-frequency application of dc-dc converter. Comparing with conventional voltage source gate driver (VSD) and the reported four switches CSD (4S-CSD), the proposed HD-CSD behaves more like the ideal current source driver which can realize the fast switching of power switches to reduce the switching loss. In addition, with proposed HD-CSD, impact of gate resistance that limits the switching speed of the power switch can be greatly reduced. Experimental results are presented to show the power efficiency improvement of buck converter with HD-CSD high-side driver comparing with VSD and 4S-CSD high-side drivers at switching frequency of 1 MHz.

Super junction trench power MOSFET devices

Abstract: In a super junction trench power MOSFET (metal oxide semiconductor field effect transistor) device, a column of p-type dopant in the super junction is separated from a first column of n-type dopant by a first column of oxide and from a second column of n-type dopant by a second column of oxide. In an n-channel device, a gate element for the FET is advantageously situated over the column of p-type dopant; and in a p-channel device, a gate element for the FET is advantageously situated over the column of n-type dopant.

Performance evaluation of all SiC power converters for realizing high power density of 50 W/cm 3

Abstract: In high-power density power converter designs, power losses of power devices are essential design parameters because they determines the volume of cooling systems. The power loss of a SiC power module using a SiC Implantation and Epitaxial MOSFET (SiC-IEMOSFET) has been evaluated in the junction temperature range from 150 °C to 250 °C and the current density range from 100 A/cm2 to 250 A/cm2. By using the power loss data, design criteria of the junction temperature and current density of the SiC-IEMOSFET to realize the power density of 50W/cm3 have been extracted.

Lateral power MOSFET structure and method of manufacture

Abstract: A lateral power MOSFET with a low specific on-resistance is described. Stacked P-top and N-grade regions in patterns of articulated circular arcs separate the source and drain of the transistor.