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Journal ArticleDOI

Hot-electron-induced MOSFET degradation—Model, monitor, and improvement

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TLDR
In this paper, a physical model involving the breaking of the ≡ Si s H bonds was proposed to explain the observed time dependence of MOSFET degradation and the observed channel field.
Abstract
Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si s H bonds. The device lifetime τ is proportional to I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5} . If I sub is large because of small L or large V d , etc., τ will be small. I sub (and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E m to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E m and I sub and, when properly designed, reduce device degradation.

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Citations
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Journal ArticleDOI

The Generation Process of Interface Traps by Hot-Carrier Injection in Nanoscale Metal–Oxide–Semiconductor Field-Effect Transistors

TL;DR: In this paper, the generation process of interface traps by hot-carrier injection in nanoscale metal-oxide-semiconductor field effect transistors (MOSFETs) was evaluated by the charge pumping (CP) method, and degradation of the threshold voltage by these interface traps was studied.
Journal ArticleDOI

A first-order kinetics ageing model for the hot-carrier stress of high-voltage MOSFETs

TL;DR: A general purpose ageing model for the device parameter drift class that may be related to the activation of a large number of statistically independent microscopic defects, with distributed activation energy and first-order reaction kinetics is derived.
Journal ArticleDOI

Substrate Current Evaluation for Lightly and Heavily Doped MOSFETs at 45 nm process Using Physical Models

TL;DR: In this paper, the authors have simulated the impact ionization phenomenon in MOSFETs using TCAD and compared the substrate current in lightly and heavily doped MOS with the help of ATLAS device simulator.
Journal ArticleDOI

Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradation

TL;DR: A new 2XVDD-tolerant mixed-voltage I/O buffer circuit, realized with only 1xVDD devices in deep-submicron CMOS technology, to prevent transistors against gate-oxide reliability and hot-carrier degradation is proposed.
Journal ArticleDOI

Direct parameter extraction for hot-carrier reliability simulation

TL;DR: In this paper, the authors describe the application of a novel direct parameter extraction strategy for the BSIM3v3 MOSFET model to the hot-carrier reliability simulation problem.
References
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Journal ArticleDOI

Problems related to p-n junctions in silicon

TL;DR: In this article, a simplified model of secondary ionization, avalanche breakdown and microplasma phenomena in p-n junctions was proposed, in which holes and electrons have identical properties described by four constants: generation of highest energy or Raman phonons, energy E R and mean-free-path L R ; ionization or electron-hole pair production, threshold carrier energy E i and mean free path L i.
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Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices

TL;DR: A detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25-125°C) and fields (400-700 MV/m) comparable to those used in MNOS devices is presented in this article.
Journal ArticleDOI

An empirical model for device degradation due to hot-carrier injection

TL;DR: In this article, an empirical model for device degradation due to hot-carrier injection in submicron n-channel MOSFET's is presented, and the relationship between device degradation, drain voltage, and substrate current is clarified on the basis of experiments and modeling.
Journal ArticleDOI

Photon Emission from Avalanche Breakdown in Silicon

TL;DR: In this article, it was shown that the number of light spots increases with the current rather than individual spots growing brighter, and that all the breakdown current is carried through the junction by these localized light-emitting spots.
Journal ArticleDOI

Electrochemical Charging of Thermal SiO2 Films by Injected Electron Currents

TL;DR: In this article, a series of experiments designed to characterize the charging effect of thermal SiO2 films with water was conducted. And they found that if water is diffused into a SiO 2 film, water related centers are formed which act like electron traps with capture cross section of approximately 1.5 × 10−17 cm2.
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