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Hot-electron-induced MOSFET degradation—Model, monitor, and improvement

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TLDR
In this paper, a physical model involving the breaking of the ≡ Si s H bonds was proposed to explain the observed time dependence of MOSFET degradation and the observed channel field.
Abstract
Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si s H bonds. The device lifetime τ is proportional to I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5} . If I sub is large because of small L or large V d , etc., τ will be small. I sub (and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E m to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E m and I sub and, when properly designed, reduce device degradation.

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Journal ArticleDOI

CMOS RF and DC reliability subject to hot carrier stress and oxide soft breakdown

TL;DR: In this article, a methodology to systematically study hot carrier and soft breakdown effects on RF circuits is developed, and two design techniques to build reliable RF circuits are proposed. But the authors focus on low-noise amplifier and voltage-controlled oscillator performances.
Journal ArticleDOI

Magnitude of the threshold energy for hot electron damage in metal–oxide–semiconductor field effect transistors by hydrogen desorption

TL;DR: Based on the energetics for hydrogen desorption from the interface between silicon and silicon-dioxide, the hard threshold for this effect may be considerably lower than the previously assumed value (∼3.6 eV) as discussed by the authors.
Journal ArticleDOI

An analytical model of conductance and transconductance for enhanced-mode MOSFETs

TL;DR: In this paper, an analytical model of conductance and transconductance for enhanced-mode MOSFETs is presented based on an inversion charge dependent mobility, the model enables the calculation of the conductance/transonductance MOSFLET characteristics against several parameters such as bulk bias, oxide thickness, channel length, source-drain series resistance, surface states density, mobility reduction factor and/or potential fluctuation rate.
Journal ArticleDOI

Channel Hot-Carrier Degradation in Short-Channel Transistors With High- $k$ /Metal Gate Stacks

TL;DR: In this article, the channel hot-carrier degradation in nMOS transistors is studied for different SiO2/HfSiON dielectric stacks and compared to SiO 2.
Journal ArticleDOI

CHISEL flash EEPROM. I. Performance and scaling

TL;DR: The feasibility of using channel initiated secondary electron (CHISEL) programming in high-density flash memories containing fully scaled memory cells is demonstrated and the effect of channel length scaling on CHISEL operation and related device optimization is discussed using measurements and device simulation.
References
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Journal ArticleDOI

Problems related to p-n junctions in silicon

TL;DR: In this article, a simplified model of secondary ionization, avalanche breakdown and microplasma phenomena in p-n junctions was proposed, in which holes and electrons have identical properties described by four constants: generation of highest energy or Raman phonons, energy E R and mean-free-path L R ; ionization or electron-hole pair production, threshold carrier energy E i and mean free path L i.
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Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices

TL;DR: A detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25-125°C) and fields (400-700 MV/m) comparable to those used in MNOS devices is presented in this article.
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An empirical model for device degradation due to hot-carrier injection

TL;DR: In this article, an empirical model for device degradation due to hot-carrier injection in submicron n-channel MOSFET's is presented, and the relationship between device degradation, drain voltage, and substrate current is clarified on the basis of experiments and modeling.
Journal ArticleDOI

Photon Emission from Avalanche Breakdown in Silicon

TL;DR: In this article, it was shown that the number of light spots increases with the current rather than individual spots growing brighter, and that all the breakdown current is carried through the junction by these localized light-emitting spots.
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Electrochemical Charging of Thermal SiO2 Films by Injected Electron Currents

TL;DR: In this article, a series of experiments designed to characterize the charging effect of thermal SiO2 films with water was conducted. And they found that if water is diffused into a SiO 2 film, water related centers are formed which act like electron traps with capture cross section of approximately 1.5 × 10−17 cm2.
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