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Journal ArticleDOI

Hot-electron-induced MOSFET degradation—Model, monitor, and improvement

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TLDR
In this paper, a physical model involving the breaking of the ≡ Si s H bonds was proposed to explain the observed time dependence of MOSFET degradation and the observed channel field.
Abstract
Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si s H bonds. The device lifetime τ is proportional to I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5} . If I sub is large because of small L or large V d , etc., τ will be small. I sub (and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E m to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E m and I sub and, when properly designed, reduce device degradation.

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Proceedings ArticleDOI

Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs

TL;DR: Forksheet (FS) as discussed by the authors is a novel transistor architecture consisting of vertically stacked nFET and pFET sheets at opposite sides of a dielectric wall, thus enabling further logic cell area scaling without requiring gate length scaling.
Proceedings ArticleDOI

Hot carrier stress: Aging modeling and analysis of defect location

TL;DR: In this article, a complete TCAD model addressing Hot Carrier Degradation for Flash technology is presented and its validity range extended respect to our previous work using the correlation of drifting electrical parameters, a simple technique for the analysis of trap distribution location was presented and physical insights on defect shape evolution are provided at different stress conditions.
Journal ArticleDOI

Total dose irradiation and hot-carrier effects of sub-micro NMOSFETs

TL;DR: In this article, total dose irradiation and hot-carrier effects of sub-micro NMOSFETs are studied, and the results show that the manifestations of damage caused by these two effects are quite different, though the principles of damage formation are somewhat similar.
Proceedings ArticleDOI

Improved method for evaluating hot-carrier aging in p-channel MOSFET's

TL;DR: In this paper, a constant gate current stress method for characterizing the hot-carrier aging effect in p-channel MOSFETs is described, where the gate current is monitored and maintained constant during the stress by adjusting the drain voltage at short time intervals.
Journal ArticleDOI

Dependence of hot-carrier immunity on channel length and channel width in MOSFETs with N/sub 2/O-grown gate oxides

TL;DR: In this article, the authors report on the channel length and width dependence of hot-carrier immunity in n-MOSFETs with N/sub 2/O-grown gate oxides.
References
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Journal ArticleDOI

Problems related to p-n junctions in silicon

TL;DR: In this article, a simplified model of secondary ionization, avalanche breakdown and microplasma phenomena in p-n junctions was proposed, in which holes and electrons have identical properties described by four constants: generation of highest energy or Raman phonons, energy E R and mean-free-path L R ; ionization or electron-hole pair production, threshold carrier energy E i and mean free path L i.
Journal ArticleDOI

Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices

TL;DR: A detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25-125°C) and fields (400-700 MV/m) comparable to those used in MNOS devices is presented in this article.
Journal ArticleDOI

An empirical model for device degradation due to hot-carrier injection

TL;DR: In this article, an empirical model for device degradation due to hot-carrier injection in submicron n-channel MOSFET's is presented, and the relationship between device degradation, drain voltage, and substrate current is clarified on the basis of experiments and modeling.
Journal ArticleDOI

Photon Emission from Avalanche Breakdown in Silicon

TL;DR: In this article, it was shown that the number of light spots increases with the current rather than individual spots growing brighter, and that all the breakdown current is carried through the junction by these localized light-emitting spots.
Journal ArticleDOI

Electrochemical Charging of Thermal SiO2 Films by Injected Electron Currents

TL;DR: In this article, a series of experiments designed to characterize the charging effect of thermal SiO2 films with water was conducted. And they found that if water is diffused into a SiO 2 film, water related centers are formed which act like electron traps with capture cross section of approximately 1.5 × 10−17 cm2.
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