Journal ArticleDOI
Hot-electron-induced MOSFET degradation—Model, monitor, and improvement
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TLDR
In this paper, a physical model involving the breaking of the ≡ Si s H bonds was proposed to explain the observed time dependence of MOSFET degradation and the observed channel field.Abstract:
Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si s H bonds. The device lifetime τ is proportional to I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5} . If I sub is large because of small L or large V d , etc., τ will be small. I sub (and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E m to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E m and I sub and, when properly designed, reduce device degradation.read more
Citations
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Journal ArticleDOI
Dual-resonance concurrent oscillator
TL;DR: Measurement indicates the concurrent oscillation is sensitive to overvoltage stress, and a new dual-band CMOS class-C voltage-controlled oscillator (VCO) is studied.
Journal ArticleDOI
The effect of impact ionization induced bipolar action on n-channel hot-electron degradation
TL;DR: In this article, the relationship between the total impact ionization rate and the measured substrate current was analyzed using short-channel NMOS devices, and it was shown that holes that are injected into the source and turn on the parasitic source-bulk-drain bipolar may actually represent a significant portion of the total ionization current.
Journal ArticleDOI
The evolution of the substrate-drain junction parameters during electrical ageing for n-MOS transistor characterization
TL;DR: In this article, a new method was used to investigate hot carrier degradation of submicrometre n-MOS transistors after electrical ageing and a change in the currentvoltage characteristics of the substrate-drain junction after electrical aging has been observed and analyzed.
Journal ArticleDOI
Reliability prediction of FinFET FPGAs by MTOL
TL;DR: The MTOL (Multi-Temperature Operational Life) testing method was implemented on FPGA boards from Xilinx 16-nm FinFET technology using non-aggressive stress conditions as mentioned in this paper.
Journal ArticleDOI
Hot-carrier stress damage in the gate 'off' state in n-channel transistors
B.S. Doyle,K.R. Mistry +1 more
TL;DR: In this article, the authors examined hot-carrier damage in silicon n-MOS transistors and concluded that care must be taken to ensure that the gate voltage at the input of an inverter-like circuit stays well below the threshold voltage when the output is high.
References
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Journal ArticleDOI
Problems related to p-n junctions in silicon
TL;DR: In this article, a simplified model of secondary ionization, avalanche breakdown and microplasma phenomena in p-n junctions was proposed, in which holes and electrons have identical properties described by four constants: generation of highest energy or Raman phonons, energy E R and mean-free-path L R ; ionization or electron-hole pair production, threshold carrier energy E i and mean free path L i.
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Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices
Kjell Jeppson,Christer Svensson +1 more
TL;DR: A detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25-125°C) and fields (400-700 MV/m) comparable to those used in MNOS devices is presented in this article.
Journal ArticleDOI
An empirical model for device degradation due to hot-carrier injection
E. Takeda,N. Suzuki +1 more
TL;DR: In this article, an empirical model for device degradation due to hot-carrier injection in submicron n-channel MOSFET's is presented, and the relationship between device degradation, drain voltage, and substrate current is clarified on the basis of experiments and modeling.
Journal ArticleDOI
Photon Emission from Avalanche Breakdown in Silicon
A. G. Chynoweth,K. G. McKay +1 more
TL;DR: In this article, it was shown that the number of light spots increases with the current rather than individual spots growing brighter, and that all the breakdown current is carried through the junction by these localized light-emitting spots.
Journal ArticleDOI
Electrochemical Charging of Thermal SiO2 Films by Injected Electron Currents
TL;DR: In this article, a series of experiments designed to characterize the charging effect of thermal SiO2 films with water was conducted. And they found that if water is diffused into a SiO 2 film, water related centers are formed which act like electron traps with capture cross section of approximately 1.5 × 10−17 cm2.