Showing papers on "Bipolar junction transistor published in 2018"

Single-Event Burnout Mechanisms in SiC Power MOSFETs

Abstract: Heavy ion-induced single-event burnout (SEB) is investigated in high-voltage silicon carbide power MOSFETs. Experimental data for 1200-V SiC power MOSFETs show a significant decrease in SEB onset voltage for particle linear energy transfers greater than 10 MeV/cm2/mg, above which the SEB threshold voltage is nearly constant at half of the rated maximum operating voltage for these devices. TCAD simulations show a parasitic bipolar junction transistor turn-on mechanism, which drives the avalanching of carriers and leads to runaway drain current, resulting in SEB.

IGBT Junction Temperature Estimation via Gate Voltage Plateau Sensing

Abstract: A method for in situ high-bandwidth junction temperature estimation of insulated-gate bipolar transistors is introduced in this paper. The method is based on the acquisition of the gate voltage plateau during turn- on . It can be related to the junction temperature at any known device current, that can be effectively approximated using existing phase current measurements. This allows fast overtemperature protection of the power device or even active thermal cycle reduction via thermal control. This paper discusses, first, the physical mechanisms leading to the temperature sensitivity of the gate voltage plateau. Second, a rigorous sensitivity analysis of the gate voltage plateau is conducted. It allows to determine the maximal estimation error and provides information about the suitability of this method for various devices and applications. Finally, a sensing circuitry is presented, which allows accurate gate voltage plateau sensing every switching period as well as an easy integration into the gate driver. The performance of the proposed method is experimentally demonstrated with the sensing circuitry on a double pulse test bench over a wide operation range.

Automatic, highly reliable, fully redundant electronic circuit breaker that reduces or prevents short-circuit overcurrent

Abstract: A programmable power (PPSE) switching element including a front power transistor, a main switching transistor, and at least one reverse current blocking transistor in series, a gate of each of which is connected to a gate driver; an inductor and a shunt resistor connected in series with the transistors; a charge storage capacitor connected between ground and a junction located between the inductor and the shunt resistor; a high-speed NPN transistor, a collector of which is connected to the front power transistor and an emitter of which is connected to an output of the main switching transistor via the shunt resistor; a current measurement element in parallel to the shunt resistor; a voltage amplifier; and a high-speed MCU.

Writing monolithic integrated circuits on a two-dimensional semiconductor with a scanning light probe

Abstract: The development of complex electronics based on two-dimensional (2D) materials will require the integration of a large number of 2D devices into circuits However, a practical method of assembling such devices into integrated circuits remains elusive Here we show that a scanning visible light probe can be used to directly write electrical circuitry onto the 2D semiconductor molybdenum ditelluride (2H-MoTe2) Laser light illumination over metal patterns deposited onto 2D channels of 2H-MoTe2 can convert the channels from an n-type semiconductor to a p-type semiconductor, by creating adatom–vacancy clusters in the host lattice With this process, diffusive doping profiles can be controlled at the submicrometre scale and doping concentrations can be tuned, allowing the channel sheet resistance to be varied over four orders of magnitudes Our doping method can be used to assemble both n- and p-doped channels within the same atomic plane, which allows us to fabricate 2D device arrays of n–p–n (p–n–p) bipolar junction transistor amplifiers and radial p–n photovoltaic cells A laser can be used to locally dope two-dimensional molybdenum ditelluride channels, allowing both n- and p-doped channels to be assembled within the same atomic plane and for device arrays of n–p–n bipolar junction transistor amplifiers and radial p–n photovoltaic cells to be fabricated

Fundamental Limitations of Wide-Bandgap Semiconductors for Light-Emitting Diodes

Abstract: Fundamental limitations of wide-bandgap semiconductor devices are caused by systematic trends of the electron and hole effective mass, dopant ionization energy, and carrier drift mobility as the semiconductor’s bandgap energy increases. We show that when transitioning from narrow-bandgap to wide-bandgap semiconductors the transport properties of charge carriers in pn junctions become increasingly asymmetric and characterized by poor p-type transport. As a result, the demonstration of viable devices based on bipolar carrier transport, such as pn junction diodes, bipolar transistors, light-emitting diodes (LEDs), and lasers, becomes increasingly difficult or even impossible as the bandgap energy increases. A systematic analysis of the efficiency droop in LEDs is conducted for room temperature and cryogenic temperature and for emission wavelengths ranging from the infrared, through the visible (red and blue), to the deep-ultraviolet part of the spectrum. We find that the efficiency droop generally increases ...

The Cryogenic Temperature Behavior of Bipolar, MOS, and DTMOS Transistors in Standard CMOS

Abstract: Both CMOS bandgap voltage references and temperature sensors rely on the temperature behavior of either CMOS substrate BJTs or MOS transistors in weak inversion. Bipolar transistors are generally preferred over MOS transistors because of their lower spread. However, at deep-cryogenic temperatures, the performance of BJTs deteriorates due to a significant reduction in current gain and a substantial increase in the base resistance. On the contrary, MOS devices show more stable performance even down to 4 K, but accurate device characterization for the design of such a circuit is currently missing. We present the characterization and analysis over the temperature range from 4 K to 300 K of both substrate bipolar PNP transistors and MOS transistors in standard and dynamic threshold MOS (DTMOS) configurations implemented in a standard 0.16- $\mu \text{m}$ CMOS technology. These results demonstrate that employing MOS or DTMOS enables the operation of bandgap references and temperature sensors in standard CMOS technologies even at deep-cryogenic temperatures.

High power 3-phase to 3-phase matrix converter using dual-gate GaN bidirectional switches

Abstract: Highly efficient three-phase to three-phase matrix converters using Gallium nitride (GaN) bidirectional switches with both high current and high breakdown voltage are demonstrated. The GaN switch with dual gates works as a bidirectional switch by a single device, while a conventional bidirectional switch consists of four devices by two Insulated Gate Bipolar Transistors (IGBTs) and two diodes. In addition, the GaN bidirectional switch is also free from the voltage offsets for the current conduction so that the GaN-based matrix converter enables small size and highly efficient AC/AC conversion. Improvement of the device performance including the introduction of the recessed gate enables the low on-state resistance with stable operation free from current collapse. The maximum drain current reaches 100 A together with the breakdown voltage of 1340 V. The fabricated three-phase to three-phase matrix converter exhibits the maximum conversion efficiency of 98% at 1 kW output power with the expectation that the maximum output power can reach 10 kW or more by the high current device.

Liquid Metal Magnetohydrodynamic Pump for Junction Temperature Control of Power Modules

Abstract: Power modules are the most common components to fail in power converters that are employed in mass transportation systems, thus leading to high unscheduled maintenance cost. While operating, high junction temperature swings occur that result in high thermomechanical stress within the structure of the power module, reducing the lifetime of the module. Liquid metals as a cooling medium received so far little attention in the area of power semiconductor cooling, despite being able to remove high heat fluxes. This paper shows for the first time how liquid metal is used to reduce actively the junction temperature swing. A magnetohydrodynamic (MHD) pump has been designed for this purpose allowing active control of the flow rate of the liquid metal that impinges against the baseplate of the module. The pump has been 3-D printed and is attached directly to the power module. A closed-loop temperature control system is implemented, able to estimate the insulated-gate bipolar transistor's junction temperature, and thus, controls the MHD power. This paper presents simulation and experimental results showing reductions in the temperature swing over the full load cycle with 12 °C as the highest observed reduction rate. This paper also shows detailed designs of the MHD pump and the controller hardware.

Silicon-Germanium Heterojunction Bipolar Transistors for mm-Wave Systems: Technology, Modeling and Circuit Applications

Abstract: Fabrication and circuit design are linked by compact device modeling; i.e., the electrical characteristics of the devices fabricated on a wafer are represented by sufficiently simple but preferably still physics-based models that are suitable for circuit simulation and optimization. The importance of modeling has been growing rapidly due to strongly increased device complexity, manufacturing cost, and fabrication time. There is an increased demand from industry for first-pass success of high-frequency (HF) analog circuits in order to stay competitive. For SiGeC HBT technologies, ranging from production to the most advanced process, this has been successfully addressed by the standard compact bipolar transistor model HICUM/L2 [Schr10]. For practical applications, a compact model (CM) itself is not sufficient though. Its model parameters need to be determined from measurements of terminal (current, voltage) characteristics, preferably making use of clever test structures and mathematical manipulations (so-called parameter extraction methods) in order to be able to separate the various, often superimposed, physical effects and their related parameters. Consistent physics-based parameter extraction methods that provide for a given process accurate geometry-scalable and statistical device models not only represent a key enabler to first-pass design success but also yield important information for process development. One objective of DOTSEVEN was the development of

High-performance SiGe HBTs for next generation BiCMOS technology

Abstract: This paper addresses fabrication aspects of SiGe heterojunction bipolar transistors which record high-speed performance. We previously reported f T values of 505 GHz, f MAX values of 720 GHz, and ring oscillator gate delays of 1.34 ps for these transistors. The impact of critical process steps on radio frequency performance is discussed. This includes millisecond annealing for enhanced dopant activation and optimization of the epitaxial growth process of the base layer. It is demonstrated that the use of a disilane precursor instead of silane can result in reduced base resistance and favorable device scalability.

Active Junction Temperature Control of IGBT Based on Adjusting the Turn-off Trajectory

Abstract: The junction temperature fluctuation of an insulated-gate bipolar transistor (IGBT) is the most important factor of its aging failure, and smoothing the fluctuation is an effective way to improve the life of an IGBT. The existing methods for smoothing the fluctuation by active junction temperature control are not yet ready wide application, and exploring the different approaches to active junction temperature control is a hot topic. This paper presents a method of active junction temperature control that shifts the turn-off trajectory of an IGBT to adjust the IGBT turn-off loss for smoothing the junction temperature. The relationship between parameters of the adjusting circuit and turn-off loss is analyzed. On the basis of this analysis, a method of estimating the smoothing ability for the proposed active junction temperature control is deduced. Using an IGBT installed in a 1.2-MW direct-drive wind power converter as an example, the evaluation result shows that the proposed method can completely smooth the junction temperature fluctuation caused by a 40% rated load fluctuation. Finally, a low-power experiment is carried out.

High Performance Amplifier Element Realization via MoS2/GaTe Heterostructures.

Abstract: 2D layered materials (2DLMs), together with their heterostructures, have been attracting tremendous research interest in recent years because of their unique physical and electrical properties. A variety of circuit elements have been made using mechanically exfoliated 2DLMs recently, including hard drives, detectors, sensors, and complementary metal oxide semiconductor field-effect transistors. However, 2DLM-based amplifier circuit elements are rarely studied. Here, the integration of 2DLMs with 3D bulk materials to fabricate vertical junction transistors with current amplification based on a MoS2/GaTe heterostructure is reported. Vertical junction transistors exhibit the typical current amplification characteristics of conventional bulk bipolar junction transistors while having good current transmission coefficients (α ∼ 0.95) and current gain coefficient (β ∼ 7) at room temperature. The devices provide new attractive prospects in the investigation of 2DLM-based integrated circuits based on amplifier circuits.

An IGBT Turn-ON Concept Offering Low Losses Under Motor Drive dv/dt Constraints Based on Diode Current Adaption

Abstract: In this paper, a new low-loss turn- on concept for the silicon insulated-gate bipolar transistor (Si-IGBT) in combination with silicon p-i-n diode is presented. The concept is tailored for two-level motor converters in the 100 kW to 1 MW range under the constraint that the output voltages slopes are limited in order to protect the motor windings. Moreover, analyses of the IGBT turn- on and diode reverse recovery voltage slopes are presented concluding that the diode reverse recovery is the worst case. The concept includes a low-cost measurement of the free-wheeling diode current and temperature by the gate driver without necessity of acquiring this information from the converter control board. By using this concept, the output dv/dt at the diode turn- off can be kept approximately constant regardless of the commutated current and junction temperature. Hence, the switching losses could be decreased for the currents and temperatures where the voltage slopes are lower when using a conventional gate driver optimized for the worst case. Moreover, results are shown for one such power semiconductor, showing a total switching loss reduction of up to 28% in comparison with a gate driver without current and temperature measurement. Finally, this concept is particularly suitable for high power semiconductor modules in half-bridge configuration which are recently proposed by several suppliers.

Comparison Between High-Holding-Voltage SCR and Stacked Low-Voltage Devices for ESD Protection in High-Voltage Applications

Abstract: The modified silicon-controlled rectifier (SCR) fabricated in a 0.25- $\mu \text{m}$ high-voltage (HV) bipolar-CMOS-DMOS (BCD) technology has been proposed to seek for both effective electrostatic discharge (ESD) protection and latchup immunity. Experimental results show that one of the proposed SCRs has a high holding voltage of up to ~30 V in the 100-ns transmission line pulsing measurement results. However, through the experimental verification by using the transient latchup test, the holding voltage of such proposed device decreases to ~20 V. It is due to the increased bipolar junction transistor current gains of the SCR path induced by the Joule-heating effect in the long-term measurement. For 20-V circuit applications, the ESD robustness of the proposed SCR with a holding voltage of ~20 V is lower than that of stacked low-voltage p-type MOS in the previous studies. Developing special modification of such HV devices is inefficient to achieve both effective ESD protection and latchup-free design in this 0.25- $\mu \text{m}$ HV BCD technology.

A Monolithic Multisensor Microchip with Complete On-Chip RF Front-End.

Abstract: In this paper, a new wireless sensor, designed for a 0.35 µm CMOS technology, is presented. The microchip was designed to be placed on an object for the continuous remote monitoring of its temperature and illumination state. The temperature sensor is based on the temperature dependence of the I-V characteristics of bipolar transistors available in CMOS technology, while the illumination sensor is an integrated p-n junction photodiode. An on-chip 2.5 GHz transmitter, coupled to a mm-sized dipole radiating element fabricated on the same microchip and made in the top metal layer of the same die, sends the collected data wirelessly to a radio receiver using an On-Off Keying (OOK) modulation pattern.

Nano-Semiconductors : Devices and Technology

Abstract: Section I: Semiconductor Materials Electrical Propagation on Carbon Nanotubes: From Electrodynamics to Circuit Models, A. Maffucci, A.G. Chiariello, C. Forestiere, and G. Miano Monolithic Integration of Carbon Nanotubes and CMOS, H. Xie Facile, Scalable, and Ambient-Electrochemical Route for Titania Memristor Fabrication, S. Chaudhary and N.M. Neihart Spin Transport in Organic Semiconductors: A Brief Overview of the First Eight Years, K.M. Alam and S. Pramanik Section II: Silicon Devices and Technology SiGe BiCMOS Technology and Devices, M. Racanelli and E. Preisler Ultimate FDSOI Multigate MOSFETs and Multibarrier Boosted Gate Resonant Tunneling FETs for a New High-Performance Low-Power Paradigm, A. Afzalian Development of 3D Chip Integration Technology, K. Sakuma Embedded Spin-Transfer-Torque MRAM, K. Lee Nonvolatile Memory Device: Resistive Random Access Memory, P. Zhou, L. Chen, H. Lv, H. Wan, and Q. Sun DRAM Technology, M.J. Lee Monocrystalline Silicon Solar Cell Optimization and Modeling, J. Huang and V. Moroz Radiation Effects on Silicon Devices, M. Bagatin, S. Gerardin, and A. Paccagnella Section III: Compound Semiconductor Devices and Technology GaN/InGaN Double Heterojunction Bipolar Transistors Using Direct-Growth Technology, S.-C. Shen, J.-H. Ryou, and R.D. Dupuis GaN HEMTs Technology and Applications, G.I. Ng and S. Arulkumaran Surface Treatment, Fabrication, and Performances of GaN-Based Metal-Oxide-Semiconductor High-Electron Mobility Transistors, C.-T. Lee GaN-Based HEMTs on Large Diameter Si Substrate for Next Generation of High Power/High Temperature Devices, F. Medjdoub GaAs HBT and Power Amplifier Design for Handset Terminals, K. Yamamoto Resonant Tunneling and Negative Differential Resistance in III-Nitrides, V. Litvinov New Frontiers in Intersubband Optoelectronics Using III- Nitride Semiconductors, P.K. Kandaswamy and E. Monroy

Junction temperature estimation of IGBT module via a bond wires lift-off independent parameter V gE-np

Abstract: An electrical method for junction temperature estimation of insulated-gate bipolar transistors (IGBTs) is presented in this study. Owing to the parasitic inductance between bond wire and main emitter terminal L E . The temperature-dependent falling collector current during turn-off transition would cause a negative voltage drop in the gate-main emitter voltage waveform v gE . Therefore, this negative voltage drop V gE-np is proportional to the junction temperature. A double-pulse test circuit is developed to verify the accuracy and feasibility of the proposed method. The impacts of collector-emitter voltage V ce , collector current I c and bond-wires cut-off are also be discussed theoretically and experimentally. The experimental results show that the proposed V gE-np has a linear relationship with junction temperature as theoretical analysis and it is a bond-wires cut-off independent parameter in some special test point, which offers an effective way to estimate junction temperature without package destruction. The advantages of the proposed method include good linearity, bond-wires failure immunity and adequate sensitivity with junction temperature.

Comparative Case Study on the Self-Powered Synchronous Switching Harvesting Circuits With BJT or MOSFET Switches

Abstract: Self-powered realization for synchronous switching circuits is a hot spot for piezoelectric vibration energy harvesting. Two typical kinds of switches, bipolar junction transistor (BJT) or metal–oxide semiconductor field effect transistor (MOSFET) are popularly used without a clear understanding about the performance difference. In this paper, comparative investigations about adopting these two types of switches based on a case study are performed. It is determined that the performance difference comes from three aspects: the gate parasitic capacitance, the turning-on threshold, and the driven mechanism. In particular, the third one imposes a critical influence on the performance. Investigations are performed on the self-powered synchronous switching circuit of two possible methods: with electronic breakers or with external control units. The results from simulations and experiments show that the current-driven mechanism limits the available performance in the case of the BJT switch in comparison with the case of the MOSFET switch. The difference is especially obvious for the cases of large piezoelectric capacitance and open-circuit voltage. A preliminary design guideline is concluded that the MOSFET is probably a better choice with the same voltage and current ratings in most cases.

Low-Loss 800-V Lateral IGBT in Bulk Si Technology Using a Floating Electrode

Abstract: An 800V rated lateral insulated-gate bipolar transistor (LIGBT) for high frequency and low-cost applications is proposed. This LIGBT features a new method of adjusting the bipolar gain by using floating N+ and P+ regions connected by a floating electrode in front of the P+ collector. This floating structure lowers the injection efficiency at the collector side of the device, resulting in a very significant decrease in turn-off time and substantially lower turn-off losses. The device was fabricated in a $0.5\mu \text{m}$ bulk silicon CMOS technology at a commercial foundry without additional processing steps or process optimisation. Tests on fabricated devices showed equivalent Rdson below 70 $\text{m}\Omega \cdot $ cm2 at 125 °C with switching times as low as 250 ns at 125 °C. The novel LIGBT device showed avalanche capability and low gate capacitance and was used for the first time, in an AC/DC converter operating at 200 kHz allowing significant improvements in performance, compactness, and reduced component count.

Achieving Efficiencies Exceeding 99% in a Super-Junction 5-kW DC–DC Converter Power Stage Through the Use of an Energy Recovery Snubber and Dead-Time Optimization

Abstract: A highly efficient 5-kW bidirectional dc–dc converter power stage operating from a 400-V supply implementing super-junction (SJ) metal–oxide–semiconductor field-effect transistor (MOSFETs) is presented. SJ MOSFETs have low on-state resistances and low switching losses. However, their application in voltage-source converters can be compromised by the reverse recovery behavior of their intrinsic diodes and their highly nonlinear output capacitances. A series switching-aid circuit is used to control the output capacitance charging current. The dead times between switching transitions are assessed and optimized in order to deactivate the intrinsic diodes. The combination of these techniques enables very high efficiencies to be attained. Calorimetric measurements indicate a full-load efficiency of 99.1% for the prototype 5-kW dc–dc converter power stage. A loss reduction of approximately 50% is achieved with the prototype converter power stage when compared to an equivalent insulated-gate bipolar transistor (IGBT)-based power stage. Lastly, a loss versus duty cycle function is experimentally determined, which can be used to inform the design of a maximum efficiency point tracking system.

Excess Off-State Current in InGaAs FinFETs

Abstract: We present a detailed study of the off-state leakage current in scaled self-aligned InGaAs FinFETs. In long-channel devices, band-to-band tunneling at the drain-end of the channel is shown to be the root cause of excessive off-state current. This conclusion emerges from its characteristic electric field and temperature behavior and the absence of gate length and fin width dependencies. In short-channel devices, off-state current is significantly larger and it increases as the gate length shortens or the fin widens. We attribute this behavior to current multiplication through the gain of a floating-base parasitic bipolar transistor that is present inside the MOSFET. We extract the bipolar current gain which in short-channel devices is found to increase as the gate length shortens and decrease as the fin width narrows. In long channel devices, the current gain drops exponentially due to base recombination. This has allowed us to extract the diffusion length of electrons in the body of the transistor.

SiC MOSFET-Based Power Module Design and Analysis for EV Traction Systems

Abstract: Wide bandgap (WBG) power semiconductor devices, specifically silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) have gained attention from electric vehicle (EV) system developers due to well-known superior properties in comparison to industry standard silicon (Si) based MOSFETs and insulated-gate bipolar transistors (IGBTs). In this work, a power module design based on SiC MOSFETs in a segmented two-level, three-phase inverter topology with 125 kW peak output power and 30 kHz switching frequency is presented. Three different SiC MOSFET die options are analyzed according to experimentally obtained operating conditions of a commercial EV traction system. Substrate design of the power module for multi-die layout, heat sink design, and integration of a segmented phase leg module are presented. Finite-element electrical and thermal analysis of the proposed system are presented and discussed.

500 °C, High Current Linear Voltage Regulator in 4H-SiC BJT Technology

Abstract: This letter reports on a fully integrated 2- ${A}$ linear voltage regulator operational in a wide temperature range from 25 °C up to 500 °C fabricated in 4H-SiC technology. The circuit provides a stable output voltage with less than 1% variation in the entire temperature range. This letter demonstrates the first power supply solution providing both high-temperature (up to 500 °C) and high-load driving capabilities (up to 2 ${A}$ ).

A Compact, 10-kV, 2-ns Risetime Pulsed-Power Circuit Based on Off-the-Shelf Components

Abstract: The use of drift-step-recovery diodes (DSRDs) for producing high-voltage pulses in the nanosecond range requires a prime switch. The prime switch pumps the DSRD with carriers in the forward direction and then pulses the DSRD quickly in the reverse direction. Fast pulsing is necessary in order to achieve a high-compression ratio between the load peak voltage and the supply voltage. Thus, typically, either a fast (a few nanoseconds) metal-oxide semiconductor field-effect transistor, or the combination of a slow (tens of nanoseconds) insulated-gate bipolar transistor (IGBT) with a magnetic switch, is used for this purpose. The circuit presented here features four compression stages. The first stage consists of a precharged capacitor and an inductor in series, where an IGBT is used for the DSRD pumping. The second stage is similar to the first one, with the exception of its capacitor being precharged in the negative direction. This provides enhanced performance for the DSRD pulsing, alleviating the need for a magnetic switch. The third and fourth stages consist of DSRDs, where a small voltage bias allows balancing of their pumping charges. A compact, $100\times 50\times 30$ mm, circuit with an output of 10.3-kV, 1.85-ns risetime using commercially available off-the-shelf components is presented.

Tribotronic bipolar junction transistor for mechanical frequency monitoring and use as touch switch.

Abstract: Tribotronics, a new field that involves the coupling of triboelectricity and semiconductors, has attracted great interest in the nanoenergy and nanoelectronics domains. This paper proposes a tribotronic bipolar junction transistor (TBJT) that incorporates a bipolar junction transistor and a triboelectric nanogenerator (TENG) in the single-electrode mode. When the mobile triboelectric layer slides on the device surface for electrification, a bias voltage is created and applied to the emitter junction, and then the base current from the TENG is amplified. Based on the fabricated TBJT, a mechanical frequency monitoring sensor with high sensitivity and excellent stability and a finger-triggered touch switch were developed. This work demonstrated for the first time a tribotronic device with simultaneously controlled voltage and current voltage/current simultaneously controlled tribotronic device, which has promising potential applications in micro/nano-sensors, human-machine interactions, intelligent instrumentation, wearable electronics, and other applications.

GaAsP/InGaP HBTs grown epitaxially on Si substrates: Effect of dislocation density on DC current gain

Abstract: Heterojunction bipolar transistors (HBTs) with GaAs0.825P0.175 bases and collectors and In0.40Ga0.60P emitters were integrated monolithically onto Si substrates. The HBT structures were grown epitaxially on Si via metalorganic chemical vapor deposition, using SiGe compositionally graded buffers to accommodate the lattice mismatch while maintaining threading dislocation density at an acceptable level (∼3 × 106 cm−2). GaAs0.825P0.175 is used as an active material instead of GaAs because of its higher bandgap (increased breakdown voltage) and closer lattice constant to Si. Misfit dislocation density in the active device layers, measured by electron-beam-induced current, was reduced by making iterative changes to the epitaxial structure. This optimized process culminated in a GaAs0.825P0.175/In0.40Ga0.60P HBT grown on Si with a DC current gain of 156. By considering the various GaAsP/InGaP HBTs grown on Si substrates alongside several control devices grown on GaAs substrates, a wide range of threading disloca...

Scalable Compact Modeling of III–V DHBTs: Prospective Figures of Merit Toward Terahertz Operation

Abstract: We investigate the bias, temperature, and frequency dependence of two III–V double heterojunction bipolar transistors technologies based on InGaAs/InP and GaAsSb/InP processes, using a HiCuM/L2 compact model-based multigeometry scalable parameter extraction methodology. Very good agreement between the model simulations and experimental data is demonstrated. Transistor currents and junction capacitances show very good scaling, thereby allowing the separation of intrinsic and peripheral effects. Prediction of future III–V HBT technologies figures-of-merit is performed by using the generated scalable model card.

Transferred-Substrate InP/GaAsSb Heterojunction Bipolar Transistor Technology With ${f}_{\text{max}}$ ~ 0.53 THz

Abstract: We report on the realization mymargin of transferred-substrate InP/GaAsSb double heterostructure bipolar transistors in a terahertz monolithic integrated circuit process. Transistors with 0.4- $\mu \text{m}$ -wide single emitters reached unilateral gain cutoff frequencies of around 530 GHz with simultaneous current gain cutoff frequencies above 350 GHz. Extrinsic collector capacitance is effectively reduced in the transfer-substrate process. In combination with the high collector breakdown voltage in the InP/GaAsSb heterobipolar transistor structure of 5 V, this process is amenable to analog power applications at millimeter (mm-wave) and sub-mm-wave frequencies. We demonstrate reliable extraction procedures for unilateral gain and current gain cutoff frequencies.

Improved Model for Excess Base Current in Irradiated Lateral p-n-p Bipolar Junction Transistors

Abstract: An improved total ionizing dose model for lateral p-n-p bipolar junction transistors is described. The model captures the impact of charged defects on radiation-induced excess base current. Failure to incorporate this mechanism in model underestimates gain degradation.