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Showing papers on "Junction temperature published in 2012"


Journal ArticleDOI
TL;DR: A method to monitor solder fatigue in a voltage source inverter insulated gate bipolar transistor power module by detecting the change of an inverter output harmonic is presented.
Abstract: Condition monitoring power semiconductor devices can inform converter maintenance and reduce damage. This paper presents a method to monitor solder fatigue in a voltage source inverter insulated gate bipolar transistor power module by detecting the change of an inverter output harmonic. It is shown that low-order harmonics, caused by nonideal switching, are affected by the device junction temperature, which in turn depends upon module solder condition. To improve the detection accuracy of the phenomenon, the inverter controller is set to cause harmonic resonance at the target harmonic frequency. The would-be resonance is suppressed by an outer control loop where the control action can be used as the condition monitoring signal. Simulation and experiment are presented to validate the method and evaluate its performance in operation.

153 citations


Journal ArticleDOI
TL;DR: A thermal analysis of high power LED packages implementing chip-on-board (COB) architecture combined with power electronic substrate focusing on heat spreading effect is conducted, bypassing the need for detailed computational simulations using FEA.

124 citations


Journal ArticleDOI
TL;DR: In this paper, the effects preceding a latch-up fault in insulated gate bipolar transistors (IGBTs) are studied. And a metric is derived from the model to standardize the relative estimates in junction temperature from measurements of turn-off time.
Abstract: In this paper, effects preceding a latch-up fault in insulated gate bipolar transistors (IGBTs) are studied. Primary failure modes associated with IGBT latch-up faults are reviewed. Precursors to latch-up, primarily an increase in turn-off time as a consequence of elevated junction temperature, are examined for an IGBT. The relationship between junction temperature and turn-off time is explained by modeling the parasitic properties of an IGBT. A metric is derived from the model to standardize the relative estimates in junction temperature from measurements of turn-off time. To evaluate the effects preceding latch-up in-situ, seeded fault testing is conducted on a three-phase power inverter using aged transistors induced with a fault located in the die-attach solder layer. Experimental results demonstrated the feasibility of using the proposed metric as a precursor to transistor latch-up.

101 citations


Patent
28 Aug 2012
TL;DR: In this article, the authors proposed a dual zone temperature control to improve performance of the network storage system, where the first thermal chamber contains conventional electronic components and the second thermal chamber houses non-volatile solid state memory such as flash memory.
Abstract: A chassis for a network storage system contains a first thermal chamber that houses conventional electronic components and a second thermal chamber that houses non-volatile solid state memory such as flash memory. A cooling system keeps the electronics in first thermal chamber below their maximum junction temperature. Meanwhile, a temperature regulating system maintains the solid state memory in the second thermal chamber within a range of a preferred operating temperature selected to extend the lifetime and/or improve the reliability of the solid state memory. Thus, the chassis provides dual zone temperature control to improve performance of the network storage system.

99 citations


Journal ArticleDOI
TL;DR: Optical performance analyses show that the LED with a larger chip gap has higher lumens and higher luminous efficiency, and higher junction temperatures reduce the optical performance of high power LEDs.

95 citations


Journal ArticleDOI
TL;DR: Thermal performances of 3D IC integration system-in-package (SiP) with TSV (through silicon via) interposer/chip are investigated based on heat-transfer and CFD (computational fluid dynamic) analyses.

84 citations


Journal ArticleDOI
TL;DR: In this article, the model of a merged p-i-n Schottky (MPS) SiC diode is presented, and its parameters are identified with experimental measurements.
Abstract: Silicon carbide (SiC) power devices can operate at much higher junction temperature than those made of silicon. However, this does not mean that SiC devices can operate without a good cooling system. To demonstrate this, the model of a merged p-i-n Schottky (MPS) SiC diode is presented, and its parameters are identified with experimental measurements. This model is then used to study the ruggedness of the diode regarding the thermal runaway phenomenon. Finally, it is shown that, where a purely unipolar diode would be unstable, the MPS structure brings increased stability.

79 citations


Journal ArticleDOI
TL;DR: In this article, a novel design with variable fin density is proposed to generate a more uniform temperature of the IC chip junctions, which allows the gradual increase of the heat transfer area as coolant passes through the system.
Abstract: Numerical analyses to characterize and design micro pin fin heat sinks for cooling the 2016s IC chip heat generation are carried out in this paper. A novel design with variable fin density is proposed to generate a more uniform temperature of the IC chip junctions. The variable-density feature allows the gradual increase of the heat transfer area as coolant passes through the system. Single-phase water in the laminar regime is employed. Four different fin shapes (circle, square, elliptical, and flat with two redounded sides) are analyzed. The junction temperature and pressure drop variations in the heat sink generated by these shapes are presented. The effects of varying the fin length and height are also studied. The best heat sink configuration has a thermal resistance ranging from 0.14 to 0.25 K/W with a pressure drop lower than 90 kPa and a junction temperature ~ 314 K under the conditions studied. The temperature gradient at the bottom wall of the heat sink is considered as a parameter for comparing various heat sink designs. The novel cooling device has an overall temperature gradient lower than 2°C/mm, which is significantly lower than the temperature gradients in other schemes reported in literature.

75 citations


Journal ArticleDOI
TL;DR: In this article, the effects of drive current and junction temperature on the changes of chromaticity coordinates are studied experimentally using a commercial white LED sample, LUXEON K2, and the impact of dc, pulse width modulation (PWM), and bilevel current waveform is discussed through a graphical analysis.
Abstract: Most commercial white LEDs are made from nitride-based blue LEDs coated with yttrium aluminium garnet phosphor, which produce spectra that shift in opposite directions under the influences of drive current and junction temperature changes. This property gives rise to different emitted spectra, hence chromaticity properties, when the LED is driven/dimmed by different current waveforms. By using a commercial white LED sample, LUXEON K2, the effects of drive current and junction temperature on the changes of chromaticity coordinates are studied experimentally. The impact of dc, pulse width modulation (PWM), and bilevel current waveform is discussed through a graphical analysis, followed by experimental verification. It is proven that dc offers the best color stability over dimming due to the counteracting influences of drive current and junction temperature variations, whereas an LED constantly suffers from noneliminable chromaticity changes when driven by the PWM. Theoretical explanations are given to justify these cases, and it is found that, for the case of dc drive, an ideal heat sink's thermal resistance can be selected based on a simple equation to minimize the overall chromaticity change over dimming. This paper provides an in-depth discussion on the relations between the chromaticity properties of phosphor-converted (pc) white LEDs and the driving/dimming methods used.

75 citations


Journal ArticleDOI
TL;DR: The COP module under natural and forced convection conditions was studied, and the results showed that the junction-to-air thermal resistances are sensitive to the flow conditions, but not for thermal resistsances from the junction to aluminum substrate and to heat sink.

73 citations


Journal ArticleDOI
TL;DR: In this paper, the authors investigated the thermal performance of a 10MW 3L-NPC wind power inverter under low-voltage ride through (LVRT) conditions and proposed a new space vector modulation method to optimize the thermal distribution.
Abstract: The three-level neutral-point-clamped (3L-NPC) converter is a promising multilevel topology for use in the megawatts wind power generation system. However, the requirements for the grid side inverter under low-voltage ride through (LVRT) of power grid could impose extreme stress to the switching devices in this converter topology. The study investigates the loss and thermal performances of a 10 MW 3L-NPC wind power inverter undergoing LVRT condition. A new space vector modulation method is proposed to optimise the thermal distribution of this extreme situation. It is concluded that, with the proposed modulation method, the thermal distribution in the 3L-NPC wind power inverter under LVRT becomes more equal and the junction temperature of the most stressed power device can be significantly reduced, whereas the control ability of DC-bus neutral point potential is not compromised.

Proceedings ArticleDOI
01 Sep 2012
TL;DR: In this article, the high-temperature performance of the commercial SiC power MOSFETs has been extensively evaluated beyond 125 °C -the maximum junction temperature according to the datasheet.
Abstract: In this paper, the high-temperature performance of the commercial SiC power MOSFETs has been extensively evaluated beyond 125 °C - the maximum junction temperature according to the datasheet. Both the static and switching characteristics have been measured under various temperatures up to 200 °C. The results show the superior electrical performance of the SiC MOSFETs for high-temperature operation. Meanwhile, the gate biasing and gate switching tests have also been conducted to test the gate oxide reliability of these devices under elevated temperatures. The test results reveal the degradation in the device characteristics under high temperature and different gate voltage conditions, which exhibit the trade-off between the performance and the reliability of SiC MOSFETs for high-temperature applications.

Journal ArticleDOI
TL;DR: It was found that the thermal improvement of the LED module led to the enhancement of the light output power and radiant intensity and the temperature calibrating factor, 0.046 nm/°C, was calculated from the peak wavelengths of the LEDs modules.

Journal ArticleDOI
01 Aug 2012-Energy
TL;DR: In this paper, the junction temperature of the photovoltaic (PV) modules is directly determined based on the p-n junction semiconductor theory, and the proposed method is a new and simple approach with a low calculation burden.

Journal ArticleDOI
TL;DR: A novel concept for a coronary-stent-like model to solve the problem of compactness between wick and copper mesh, which can enhance the performance of the hybrid structure flat plate heat pipe of LED lighting modules is presented.

Proceedings ArticleDOI
09 Mar 2012
TL;DR: In this paper, the authors proposed to use infrared (IR) measurements in order to evaluate the relevance of three commonly used TSEP with IGBT chips: the saturation voltage under a low current, the gate-emitter voltage and the saturation current.
Abstract: The measurement of the junction temperature with thermo-sensitive electrical parameters (TSEPs) is largely used by electrical engineers or researchers but the obtained temperature value is generally not verified by any referential information of the actual chip temperature distribution. In this paper, we propose to use infrared (IR) measurements in order to evaluate the relevance of three commonly used TSEP with IGBT chips: the saturation voltage under a low current, the gate-emitter voltage and the saturation current. The IR measurements are presented in details with an estimation of the emissivity of the black paint deposited on the power module. The temperatures obtained with IR measurement and with the different TSEPs are then compared in two cases: the use of only one chip and the use of two paralleled chips.

Journal ArticleDOI
TL;DR: The findings of this study indicate that void configurations, void depth and void location are vital parameters in evaluating the thermal effects of voids and suggest that void extending through the entire thickness of solder layer and voids formed very close to the heat generating area of the chip can significantly increase package thermal resistance and chip junction temperature.

Proceedings ArticleDOI
20 Mar 2012
TL;DR: The mathematical model is used to calculate the average losses and junction temperature of the semiconductor devices in dependence on the converter output power and their several components are shown.
Abstract: This paper describes briefly the modeling of the modular multilevel converter, which was introduced by Rainer Marquardt [1]. The mathematical model is used to calculate the average losses and junction temperature of the semiconductor devices in dependence on the converter output power. The junction temperature, the semiconductor losses and their several components are shown in order to compare a converter with IGCTs and a converter with IGBTs as switches. The comparison is made to show in which operating point the one or the other has its advantages.

Journal ArticleDOI
TL;DR: In this article, a thermal resistor-capacitor (RC) network approach is presented to accurately predict transient junction temperatures, which consists of extraction of the thermal Foster network and prediction of the transient junction temperature response to a given power input using the extracted network.
Abstract: Junction temperature is an important issue for a semiconductor package, influencing the package's thermal, mechanical, and reliability performance. An accurate prediction of junction temperature provides informative guidance in design, development and operation of the package. A compact thermal resistor-capacitor (RC) network approach is presented in this paper to accurately predict transient junction temperatures. The thermal RC network in this approach is a nongrounded Foster network. This approach consists of extraction of the thermal Foster network and prediction of the transient junction temperature response to a given power input using the extracted network. The network extraction part is based on Kirchhoff's current law and Laplace transformation technique, and uses the Foster network to facilitate changes of the RC network structure. The temperature prediction part is a direct substitution-and-calculation process, and therefore is fast to carry out. Since Laplace transforms are directly or indirectly available for most power inputs, their transient temperatures may be predicted by the proposed approach. Superposition is employed in cases where the Laplace transform of a given power input is not directly found in Laplace tables, or where the junction temperature is affected by multiple heat sources. The proposed approach is demonstrated with a power amplifier (PA) module; predicted junction temperatures are accurate in both single and multiple heat source cases.

Journal ArticleDOI
TL;DR: In this article, the authors describe a novel thermal characterization method of GaN-based Light Emitting Diode (LED) package driven under the Alternating Current (AC) mode.
Abstract: In this paper we describe a novel thermal characterization method of GaN-based Light Emitting Diode (LED) package driven under the Alternating Current (AC) mode. The result was compared with the results from the thermal analysis for LED package operated under the Direct Current (DC) condition. Different from the DC condition, the junction temperature rise with the operation time of LED package was exhibited in a band formation. Finite Volume Method (FVM) was utilized to calculate the thermal performance of LED package under the AC condition using the input power extracted from the output current and voltage from the AC power supply. The experimental result was in a good agreement with the simulation data.

Proceedings ArticleDOI
30 Jul 2012
TL;DR: In this paper, the experimental evaluation of 3D ICs with embedded microfluidic cooling is described, and different architectures are experimentally evaluated ine hiding: 1) a memory-on-processor stack.
Abstract: Cooling is a significant challenge for high-performance high-power 3D ICs. hi this paper, we describe the experimental evaluation of 3D ICs with embedded microfluidic cooling. Different architectures are experimentally evaluated ine hiding: 1) a memory-on-processor stack. 2) a processor-on-processor stack with equal power dissipation, and 3) a processor-on-processor stack with different power dissipation, hi all cases, embedded microfluidic cooling shows significant junction temperature reduction compared to air-cooling.

Journal ArticleDOI
TL;DR: In this article, the thermal performance of 12-nm-thick single-quantum-well (SQW) InGaN blue light-emitting diodes (LEDs) grown on the semipolar (2021) plane was reported.
Abstract: We report on the thermal performance of the electroluminescence of 12-nm-thick single-quantum-well (SQW) InGaN blue light-emitting diodes (LEDs) grown on the semipolar (2021) plane. At a current density 100 A/cm2, the external quantum efficiency (EQE) decreased by 9.7% when the temperature was increased from 20 to 100 °C. Hot/cold factors were more than 0.9 at current densities greater than 20 A/cm2. A high characteristic temperature of 900 K and low junction temperature of 68 °C were also measured using bare LED chips.

Journal ArticleDOI
TL;DR: In this article, the current and temperature dependence of GaN-based high power blue light-emitting diodes were investigated and a set of temperature sensitive optical parameters (TSOPs) were identified that can provide a real-time solution for determining the junction temperature.
Abstract: We investigate the current and temperature dependence of GaN-based high power blue light-emitting diodes and identify a set of temperature sensitive optical parameters (TSOPs) that can provide a real-time solution for determining the junction temperature (Tj). The relationships among Tj, forward current and TSOPs, “center of mass” wavelength, and, in particular, full width at half maximum (FWHM) have been studied, and the relevant mathematic models have been developed. The analysis indicates that using FWHM may yield higher accuracy than using other parameters as TSOPs.

Journal ArticleDOI
TL;DR: The results indicate that contact thermal resistance increased dramatically at the die-attached interfaces of flip-chip GaN high-power light emitting diodes with aging time and stress, degrading the luminous flux.

Journal ArticleDOI
TL;DR: A specific electronic board used to compare four common TSEPs of IGBT chips is presented and shows that the best studied parameter (in terms of robustness and usability) is the gate emitter voltage.

Proceedings ArticleDOI
29 May 2012
TL;DR: In this article, the performance and reliability of 4H-SiC MOSFETs were evaluated under high-temperature overvoltage and pulsed overcurrent conditions, and current collapse was observed and analyzed, and trapping components with very different time constants were found to be involved.
Abstract: Power devices based on the wide-bandgap semiconductors SiC and GaN have many potential advantages compared to conventional Si-based switching devices, especially for renewable energy and smart grid applications. However, while these emerging devices have developed rapidly in recent years, many factors affecting their performance and reliability remain unknown. In this paper, we discuss some of the key results that have been obtained for both SiC- and GaN-based devices under Sandia National Lab's “post-Silicon” power electronics reliability program. State-of-the-art, commercially available 4H-SiC MOSFETs are evaluated for stability under high-temperature over-voltage and pulsed over-current conditions. The devices show maximum vulnerability under high-temperature off-state operation at high temperature. The room-temperature pulsed over-current operation results in degradation similar to that observed under high-temperature on-state DC conditions, presumably due to overheating of the device beyond its specified junction temperature. Prototype AlGaN/GaN HEMTs with ∼1800 V breakdown are evaluated for stability under different bias conditions. Current collapse is observed and analyzed, and trapping components with very different time constants are found to be involved. The specific nature of degradation and recovery depends strongly upon the particular stress bias (gate vs. drain) condition applied.

Journal ArticleDOI
TL;DR: This paper investigates the lifetime of high power IGBTs (insulated gate bipolar transistors) used in large wind turbine applications and the probabilistic and determinist damage models are presented with estimated fatigue lives.

Patent
25 May 2012
TL;DR: In this paper, the actual junction LED temperature is obtained based on the measured electrical properties, such as the voltage across and/or current passing through the LEDs, during operation, and the measured junction temperature may be used in a closed-loop feedback configuration to control the power applied to the LED in order to avoid overheating.
Abstract: Control systems and methods that directly measure the actual junction temperature of LEDs utilize internal electrical measurements, thereby dispensing with external sensors and/or wires. In various embodiments, the actual junction LED temperature is obtained based on the measured electrical properties, such as the voltage across and/or current passing through the LEDs, during operation. The measured junction temperature may be used in a closed-loop feedback configuration to control the power applied to the LED in order to avoid overheating.

Journal ArticleDOI
TL;DR: A finite element (FE) model of the chip-in-substrate-type structure with an effective methodology, which is validated through the forward voltage method, is established and the design concepts of LED packaging are investigated.

Journal ArticleDOI
TL;DR: In this article, a thermoelectric microfluidic sensor (TMS) was developed for characterizing biochemical reactions, which consists of a 100-μm deep microfluideic channel with a Bi/Sb thin-film thermopile attached to its bottom surface.
Abstract: A thermoelectric microfluidic sensor (TMS) was developed for characterizing biochemical reactions. The device consists of a 100 μm deep microfluidic channel with a Bi/Sb thin-film thermopile attached to its bottom surface. The thermopile has a Seebeck coefficient of ∼7 μV (m K)−1 and excellent rejection of common mode thermal signals. The design and geometry of the microfluidic device and thermopile in combination with hydrodynamic fluid focusing facilitates the detection of small dynamic temperature changes in the order of 10−4 K without the control of ambient temperature or the thermopile reference junction temperature. Response of the thermopile for interaction of water with various concentrations of ethanol was studied to demonstrate the operation of the sensor. CoventorWare® simulations were performed to demonstrate the hydrodynamic focusing effect and the extent of mixing for different device flow rates. The device has the sensitivity of 0.045 V-s J−1 when known quantities of energy are applied to a nichrome heater incorporated on the inner side of the microfluidic sensor bottom channel wall, while continuously injecting deionized (DI) water. A low ethanol sample volume of 5 μL is used in the microfluidic device. Effects of flow rates on the ethanol response were characterized. Results showed an increased ethanol response with a decrease in the relative inlet flow rates.