Showing papers on "Power semiconductor device published in 2013"

Gallium nitride devices for power electronic applications

Abstract: Recent success with the fabrication of high-performance GaN-on-Si high-voltage HFETs has made this technology a contender for power electronic applications. This paper discusses the properties of GaN that make it an attractive alternative to established silicon and emerging SiC power devices. Progress in development of vertical power devices from bulk GaN is reviewed followed by analysis of the prospects for GaN-on-Si HFET structures. Challenges and innovative solutions to creating enhancement-mode power switches are reviewed.

GaN on Si Technologies for Power Switching Devices

Abstract: This paper reviews the recent activities for normally-off GaN-based gate injection transistors (GITs) on Si substrates and their application to inverters. Epitaxial growth of the AlGaN/GaN heterostructures with good crystallinity over 200-mm Si substrates with eliminated bowing enables low-cost fabrication of GaN devices with high breakdown voltages. A novel normally-off GaN transistor called as GIT is proposed in which hole injection from the p-type AlGaN gate increases the drain current with low on-state resistance by conductivity modulation. The low on-state resistance in GaN-based devices greatly helps to increase the efficiency of power switching systems. A GaN-based three-phase inverter successfully drives a motor with high efficiency of 99.3% at a high output power of 1500 W. The presented GaN-based devices are expected to greatly help saving energy in the future as an indispensable power switching system.

A Lifetime Estimation Technique for Voltage Source Inverters

Abstract: This paper presents a method to estimate the inverter lifetime so that we can predict a failure prior to it actually happening. The key contribution of this study is to link the physics of the power devices to a large scale system simulation within a reasonable framework of time. By configuring this technique to a real system, it can be used as a converter design tool or online lifetime estimation tool. In this paper, the presented method is applied to the grid side inverter to show its validity. A power cycling test is designed to gather the lifetime data of a selected insulated gate bipolar transistor (IGBT) module (SKM50GB123D). Die-attach solder fatigue is found out to be the dominant failure mode of this IGBT module under the designed accelerated tests. Furthermore, the crack initiation is found to be highly stress dependent while the crack propagation is almost independent with stress level. Two different damage accumulation methods are used and the estimation results are compared.

Understanding the effect of PCB layout on circuit performance in a high frequency gallium nitride based point of load converter

Abstract: The introduction of enhancement mode gallium nitride based power devices such as the eGaN®FET offers the potential to achieve higher efficiencies and higher switching frequencies than possible with Silicon MOSFETs. With the improvements in switching performance and low parasitic packaging provided by eGaN FETs, the PCB layout becomes critical to converter performance. This paper will study the effect of PCB layout parasitic inductance on efficiency and peak device voltage stress for an eGaN FET based point of load (POL) converter operating at a switching frequency of 1 MHz, an input voltage range of 12-28 V, an output voltage of 1.2 V, and an output current up to 20 A. This work will also compare the parasitic inductances of conventional PCB layouts and propose an improved PCB design providing a 40% decrease in parasitic inductance over the best conventional PCB design.

Evaluation of $V_{\rm ce}$ Monitoring as a Real-Time Method to Estimate Aging of Bond Wire-IGBT Modules Stressed by Power Cycling

Abstract: The supervision of semiconductor power devices in operation demonstrates an obvious interest to improve the operating safety of electronic power converters used in critical applications. Unfortunately, this is a significant challenge due to the variability of stress conditions on the one hand and to the difficulty to implement accurate measurement systems in power stages on the other. Using VCE measurement as a real-time supervision method is evaluated here by using aging test results obtained on insulated gate bipolar transistor (IGBT) modules stressed by power cycling. These results are related to the aging of bond wires and metallization, on the top part of the module. Results were obtained in original test benches whose characteristics are overviewed briefly in the first part of this paper, along with a description of test conditions. The second part presents selected results extracted from a larger work and focusing on the VCE evolution with respect to degradations of the module's top part. Their analysis highlights the potential of VCE measurement. The last part proposes the principle of a specific system able to achieve real-time VCE supervision in the test benches in operation.

Electrothermal Simulation and Thermal Performance Study of GaN Vertical and Lateral Power Transistors

Abstract: In this paper, we present self-consistent electrothermal simulations of single-finger and multifinger GaN vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) and lateral AlGaN/GaN high-electron-mobility transistors (HEMTs) and compare their thermal performance. The models are first validated by comparison with experimental dc characteristics, and then used to study the maximum achievable power density of the device without the peak temperature exceeding a safe operation limit of 150°C (P150°C). It is found that the vertical MOSFETs have the potential to achieve a higher P150°C than the lateral HEMTs, especially for higher breakdown voltages and higher scaling level designs.

Prospects for the application of GaN power devices in hybrid electric vehicle drive systems

Abstract: GaN, a wide bandgap semiconductor successfully implemented in optical and high-speed electronic devices, has gained momentum in recent years for power electronics applications. Along with rapid progress in material and device processing technologies, high-voltage transistors over 600?V have been reported by a number of teams worldwide. These advances make GaN highly attractive for the growing market of electrified vehicles, which currently employ bipolar silicon devices in the 600?1200?V class for the traction inverter. However, to capture this billion-dollar power market, GaN has to compete with existing IGBT products and deliver higher performance at comparable or lower cost. This paper reviews key achievements made by the GaN semiconductor industry, requirements of the automotive electric drive system and remaining challenges for GaN power devices to fit in the inverter application of hybrid vehicles.

Online Vce measurement method for wear-out monitoring of high power IGBT modules

Abstract: A simple Vce online monitoring circuit is presented in this paper. It allows an accurate wear out prediction of IGBT modules, in high-power applications, during normal converter operation. Bipolar measurement allows monitoring of both IGBT and antiparallel diode. The circuit uses two serial connected diodes to sense the Vce voltage with millivolt accuracy. One diode acts as a protection to block high DC voltage present on input terminals. When the device is conducting the voltage on the second diode is measured to compensate for the voltage drop on the protection diode thus eliminating voltage offset due to diodes' forward voltage temperature dependency. Using four diodes one can monitor voltages on all power devices in a converter leg.

Nickel–Tin Transient Liquid Phase Bonding Toward High-Temperature Operational Power Electronics in Electrified Vehicles

Abstract: This paper presents the concept, fabrication, and evaluation for quality and reliability of nickel-tin transient liquid phase (Ni-Sn TLP) bonding that provides high reliability for high-temperature operational power electronics in electrified vehicles The need for automotive power electronics to operate at high-temperature presents significant challenges in terms of packaging and bonding technology used TLP bonding is one attachment approach that addresses these challenges and facilitates high remelting temperatures while allowing processing to occur at relatively low temperatures and pressures In particular, the Ni-Sn TLP bonding process exhibits a number of desirable characteristics for power electronics, including popularity in conventional power electronics, low cost, and uniform and homogeneous alloy formation The work herein presents Ni-Sn TLP bonding (ready for high-temperature operation) as applied to silicon power devices of relatively large size (12 mm × 9 mm) The quality and reliability of the developed bonding process was characterized using material, optical, and electrical analysis Analysis indicates that the resulting bondline is uniformly composed of Ni3Sn4 alloy throughout the bond area This bonding approach has exhibited excellent reliability for bonded devices after thermal cycling from -40°C to 200°C Electrical properties of the bonded insulated gate bipolar transistor power devices demonstrated that Ni-Sn TLP bonding exhibits electrical performance comparable with conventional solder and is reliable at high-temperature operation

Fault Diagnosis Digital Method for Power Transistors in Power Converters of Switched Reluctance Motors

Abstract: This paper describes four main fault types of the asymmetric bridge power converter in switched reluctance motor drive on power transistors. Two on-line fault diagnosis methods for power transistors in the power converter are proposed. The principle of the proposed diagnosis methods is to detect the real-time current state from some particular positions, and then obtain the diagnosis result and the fault location by logical judgment. One fault diagnosis method is proposed using single current sensor monitoring the chopped bus current; the other method is using dual current sensors scheme monitoring the upper freewheeling bus current and excitation bus current. The simulation results of current states from certain positions of a three-phase 12/8 motor and its power converter are analyzed. Experiments have verified the effectiveness of the proposed fault diagnosis methods. It is shown that the dual current sensors scheme monitoring the upper freewheeling bus current and excitation bus current has the fastest fault response.

A Comparative Performance Study of an Interleaved Boost Converter Using Commercial Si and SiC Diodes for PV Applications

Abstract: A performance comparison of an interleaved boost converter (IBC) using Si and SiC diodes for photovoltaic (PV) energy conversion systems is presented in this paper. The performance attributes under investigation include the semiconductor device behavior, thermal requirement, system efficiency, and power density. The IBC is designed to sustain the dc-link voltage in the energy conversion system and to provide the maximum power point tracking in the PV system. Due to the absence of reverse recovery current in SiC Schottky diodes, low switching losses are generated in diodes and switches. This benefit results in a higher system efficiency and smaller cooling system design requirement. As a benefit, the volume and weight of the heatsink can be further reduced. Furthermore, behaviors of the power semiconductors, which will impact the performance in the system, are discussed in the paper. The validity of the analysis is confirmed experimentally with a 2.5-kW IBC prototype with relatively wide power and input voltage operating range. The overall performance of the IBC prototype using Si and SiC diodes is summarized in a table for easy comparison.

A 0.9-/spl mu/A Quiescent Current Output-Capacitorless LDO Regulator With Adaptive Power Transistors in 65-nm CMOS

Abstract: An ultra-low quiescent current output-capacitorless low-dropout (OCL-LDO) regulator with adaptive power transistors technique is presented in this paper. The proposed technique permits the regulator to transform itself between 2-stage and 3-stage cascaded topologies with respective power transistor, depending on the load current condition. As such, it enables the OCL-LDO regulator to achieve ultra-low power consumption, high stability and good transient response without the need of off-chip capacitor at the output. The proposed LDO regulator has been implemented and fabricated in a UMC 65-nm CMOS process. It occupies an active area of 0.017 mm2 . The measured results have shown that the proposed circuit consumes a quiescent current of 0.9 μA at no load, regulating the output at 1 V from a voltage supply of 1.2 V. It achieves full range stability from 0 to 100 mA load current at a maximum 100 pF parasitic capacitance load. The measured transient output voltage is 68.8 mV when load current is stepped from 0 to 100 mA in 300 ns with CL = 100 pF. The recovery time is about 6 μs. Compared to previously reported counterparts, the proposed OCL-LDO regulator shows a significant improvement in term of OCL-LDO transient figure-of-merit (FOM) as well as balanced performance parameters in terms of PSR, line regulation and load regulation.

Component cost models for multi-objective optimizations of switched-mode power converters

Abstract: Besides product differentiation, cost is a key parameter for market success and sustainable competitive advantage of industrial companies. Academic research in the field of power electronics, however, is often confined to the search for technical innovations or optimizations with focus on pure physical performance indices while the cost dimension is neglected. An explanation for the lack of such cost considerations is the generally poor availability of cost data in academia. This paper discusses the necessity of an increased awareness and sensitivity towards costs and the related opportunities for academic research. Furthermore, cost models for the power semiconductors, the passive components, the cooling systems and the printed circuit boards of switched-mode power converters with an approximate rated power between 5 and 50kW are derived. Based on manufacturer prices for large ordering quantities, numerical values for the cost model parameters are proposed. An example of a multi-objective comparison of different power converter topologies for photovoltaic applications regarding efficiency, volume and total semiconductor chip area is extended by the cost dimension to demonstrate the benefits of employing the developed cost models.

Active current balancing for parallel-connected silicon carbide MOSFETs

Abstract: In high power applications of silicon carbide (SiC) MOSFETs where parallelism is employed, current unbalance can occur and affect the performance and reliability of the power devices. In this paper, factors which cause current unbalance in these devices are analyzed. Among them, the threshold voltage mismatch is identified as a major factor for dynamic current unbalance. The threshold distribution of SiC MOSFETs is investigated, and its effect on current balance is studied in experiments. Based on these analyses, an active current balancing scheme is proposed. It is able to sense the unbalanced current and eliminate it by actively controlling the gate drive signal to each device. The features of fine time resolution and low complexity make this scheme attractive to a wide variety of wide-band-gap device applications. Experimental and simulation results verify the feasibility and effectiveness of the proposed scheme.

Characterization of 15 kV SiC n-IGBT and its application considerations for high power converters

Abstract: The 4H-SiC n-IGBT is a promising power semiconductor device for medium voltage power conversion. Currently, Cree has successfully built 15 kV n-IGBTs. These IGBTs are pivotal for the smart grid power conversion systems and medium voltage drives. The need for complex multi-level topologies or series connected devices can be eliminated, while achieving reduced power loss, by using the SiC IGBT. In this paper, characteristics of the 15 kV n-IGBT have been reported for the first time. The turn-on and turn-off transitions of the 15 kV, 20 A IGBT have been experimentally evaluated up to 11 kV. This is highest switching characterization voltage ever reported on a single power semiconductor device. The paper includes static characteristics up to 25 A (forward) and 12 kV (blocking). The dependency of the power loss with voltage, current and temperature are provided. In addition, the basic converter design considerations using this ultrahigh voltage IGBT for high power conversion applications are presented. Also, a comparative evaluation is reported with an IGBT with thicker field-stop buffer layer as a means to show flexibility in choosing the IGBT design parameters based on the power converter frequency and power rating specification. Finally, power loss comparison of the IGBTs and MOSFET is provided to consummate the results for a complete reference.

Power Electronic Devices in the Future

Abstract: This paper discusses extrapolations of current silicon power device technology into the future, followed by discussions of wide band gap (WBG) power devices with a focus on silicon carbide and gallium nitride. Other WBG materials are included from carbon, such as diamond and nanotubes, to various nitrides. Far future material development, that may impact power electronic devices decades out, is also discussed.

A review on real time physical measurement techniques and their attempt to predict wear-out status of IGBT

Abstract: Insulated Gate Bipolar Transistors (IGBTs) are key component in power converters. Reliability of power converters depend on wear-out process of power modules. A physical parameter such as the on-state collector-emitter voltage (Vce) shows the status of degradation of the IGBT after a certain cycles of operation. However, the Vce mainly shows the wear-out of bond wire lift-off and solder degradation. The Vce is normally used to estimate the junction temperature in the module. The measurement of Vce is sensitive to the converter power level and fluctuations in the surrounding temperature. In spite of difficulties in the measurement, the offline and online Vce measurement topologies are implemented to study the reliability of the power converters. This paper presents a review in wear-out prediction methods of IGBT power modules and freewheeling diodes based on the real time Vce measurement. The measurement quality and some practical issues of those measurement techniques are discussed. Furthermore, the paper proposes the requirements for the measurement and prognostic approach to determine wear-out status of power modules in field applications. The online Vce measurement for a selected topology is also shown in the paper.

Performance comparison of 1200V 100A SiC MOSFET and 1200V 100A silicon IGBT

Abstract: This paper presents the characteristics of the first commercial 1200V 100A SiC MOSFET module and compares it with state-of-the-art silicon IGBT with the same rating. The results show that the 1200V SiC MOSFET has faster switching speed and much lower loss compared with silicon IGBT. Moreover, the silicon IGBT switching loss will increase significantly for higher operation temperature, while the SiC MOSFET switching loss is almost the same for different temperature. A loss model has been implemented in PLECs in order to simulation the losses. An 11kW singlephase inverter prototype with 600V dc bus and 380Vac output voltage has been built for evaluating and comparing the SiC MOSFET and Si IGBT performance. The test results match with the simulation very well and show that with 40 kHz switching frequency the inverter efficiency can be increased to 98.5% from 96.5% if replacing the Si IGBT with the SiC MOSFET module.

A High-Efficiency Positive Buck–Boost Converter With Mode-Select Circuit and Feed-Forward Techniques

Abstract: This paper presents a high-efficiency positive buck- boost converter with mode-select circuits and feed-forward techniques. Four power transistors produce more conduction and more switching losses when the positive buck-boost converter operates in buck-boost mode. Utilizing the mode-select circuit, the proposed converter can decrease the loss of switches and let the positive buck-boost converter operate in buck, buck-boost, or boost mode. By adding feed-forward techniques, the proposed converter can improve transient response when the supply voltages are changed. The proposed converter has been fabricated with TSMC 0.35-μm CMOS 2P4M processes. The total chip area is 2.59 × 2.74 mm2 (with PADs), the output voltage is 3.3 V, and the regulated supply voltage range is from 2.5-5 V. Its switching frequency is 500 kHz and the maximum power efficiency is 91.6% as the load current equals 150 mA.

An All-SiC Three-Phase Buck Rectifier for High-Efficiency Data Center Power Supplies

Abstract: The low power losses of silicon carbide (SiC) devices provide new opportunities to implement an ultra high-efficiency front-end rectifier for data center power supplies based on a 400-Vdc power distribution architecture, which requires high conversion efficiency in each power conversion stage. This paper presents a 7.5-kW high-efficiency three-phase buck rectifier with 480-Vac,rms input line-to-line voltage and 400-Vdc output voltage using SiC MOSFETs and Schottky diodes. To estimate power devices' losses, which are the dominant portion of total loss, the method of device evaluation and loss calculation is proposed based on a current source topology. This method simulates the current commutation process and estimates devices' losses during switching transients considering devices with and without switching actions in buck rectifier operation. Moreover, the power losses of buck rectifiers based on different combinations of 1200-V power devices are compared. The investigation and comparison demonstrate the benefits of each combination, and the lowest total loss in the all-SiC rectifier is clearly shown. A 7.5-kW prototype of the all-SiC three-phase buck rectifier using liquid cooling is fabricated and tested, with filter design and switching frequency chosen based on loss minimization. A full-load efficiency value greater than 98.5% is achieved.

A Fully Intraocular High-Density Self-Calibrating Epiretinal Prosthesis

Abstract: This paper presents a fully intraocular self-calibrating epiretinal prosthesis with 512 independent channels in 65 nm CMOS. A novel digital calibration technique matches the biphasic currents of each channel independently while the calibration circuitry is shared among every 4 channels. Dual-band telemetry for power and data with on-chip rectifier and clock recovery reduces the number of off-chip components. The rectifier utilizes unidirectional switches to prevent reverse conduction loss in the power transistors and achieves an efficiency > 80%. The data telemetry implements a phase-shift keying (PSK) modulation scheme and supports data rates up to 20 Mb/s. The system occupies an area of 4.5 ×3.1 mm2. It features a pixel size of 0.0169 mm2 and arbitrary waveform generation per channel. In vitro measurements performed on a Pt/Ir concentric bipolar electrode in phosphate buffered saline (PBS) are presented. A statistical measurement over 40 channels from 5 different chips shows a current mismatch with μ = 1.12 μA and σ = 0.53 μA. The chip is integrated with flexible MEMS origami coils and parylene substrate to provide a fully intraocular implant.

An 84.7% Efficiency 100-MHz Package Bondwire-Based Fully Integrated Buck Converter With Precise DCM Operation and Enhanced Light-Load Efficiency

Abstract: A 100-MHz PWM fully integrated buck converter utilizing standard package bondwire as power inductor with enhanced light-load efficiency which occupies 2.25 mm2 in 0.13-μm CMOS is presented. Standard package bondwire instead of on-chip spiral metal or special spiral bondwire is implemented as power inductor to minimize the cost and the conduction loss of an integrated inductor. The accuracy requirement of bondwire inductance is relaxed by an extra discontinuous-conduction-mode (DCM) calibration loop, which solves the precise DCM operation issue of fully integrated converters and eliminates the reverse current-related loss, thus enabling the use of standard package bondwire inductor with various packaging techniques. Optimizations of the power transistors, the input decoupling capacitor (CI), and the controller are also presented to achieve an efficient and robust high-frequency design. With all three major power losses, conduction loss, switching loss, and reverse current related loss, optimized or eliminated, the efficiency is significantly improved. An efficiency of 74.8% is maintained at 10 mA, and a peak efficiency of 84.7% is measured at nominal operating conditions with a voltage conversion of 1.2 to 0.9 V. Converters with various bondwire inductances from 3 to 8.5 nH are measured to verify the reliability and compatibility of different packaging techniques.

Design and performance evaluation of overcurrent protection schemes for silicon carbide (SiC) power MOSFETs

Abstract: Overcurrent protection of silicon carbide (SiC) MOSFETs remains a challenge due to lack of practical knowledge. This paper presents two overcurrent protection methods to improve the reliability and overall cost of the SiC MOSFET based converter. First, a solid state circuit breaker (SSCB) composed primarily by a Si IGBT and a commercial gate driver IC is connected in series with the DC bus to detect and clear overcurrent faults. Second, the desaturation technique using a sensing diode to detect the drain-source voltage under overcurrent faults is implemented as well. The design considerations and potential issues of the protection methods are described and analyzed in detail. A phase-leg configuration based step-down converter is built to evaluate the performance of the proposed protection schemes under various conditions, considering variation of fault type, decoupling capacitance, protection circuit parameters, etc. Finally, a comparison is made in terms of fault response time, temperature dependent characteristics, and applications to help designers select a proper protection method.

An Adaptive Reconfigurable Rectifier for Wireless Power Transmission

Abstract: This letter presents a novel adaptive rectifier for wireless power transmission (WPT) applications. By utilizing a depletion-mode field-effect transistor (FET) switch, the configuration of the rectifier can automatically adapt to the input power level. Compared with traditional rectifiers, it can provide a consistent high RF-to-dc power conversion efficiency (PCE) over a significantly extended operating input power range. Measured results show that the PCE of this proposed adaptive rectifier keeps above 50% in the input power range spanning from -14 up to 21 dBm. Additionally, maximum PCE of more than 75% is achieved in the input power range from 5 to 15 dBm.

Power device integration on a common substrate

Abstract: A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.

Electrothermal Simulation of Self-Heating in DMOS Transistors up to Thermal Runaway

Abstract: Power double-diffusion metal-oxide-semiconductor (DMOS) transistors are often subject to significant self-heating and, thus, high device temperatures. This limits their safe operating area and reliability. Hence, a certain minimum device area is usually required for sufficient heat dissipation. However, this area often exceeds the on-state resistance requirements for advanced technologies. Thus, accurate modeling of DMOS device temperatures is crucial to avoid oversizing and to fully exploit the potential of modern technologies. In this paper, we present a modeling and simulation approach that can be used to predict the device temperature up to thermal runaway. For this, we introduce a 3-D numerical simulator which accounts for the coupled electrothermal behavior in a computationally efficient way, allowing the simulation of typical power transistors in only a few minutes. Furthermore, we will discuss how the temperature-dependent DMOS transistor behavior can be modeled for our simulations up to extremely high temperatures by extrapolation from characterization data limited to 300°C. Our approach has been successfully verified experimentally for device temperatures exceeding 500°C up to the onset of thermal runaway. Measurement and simulation results will be presented for both vertical and lateral DMOS transistors fabricated in two automotive BCD technologies.

Optimal design of the modular multilevel converter for an energy storage system based on split batteries

Abstract: This paper presents the optimal design of a modular multilevel converter (MMC) for use in a standalone high power energy storage system based on split batteries (sBESS). The MMC allows for the sBESS to connect directly to the medium-voltage grid without the need for a line-transformer. A free parameter variation is performed to compare designs with different numbers of modules and different power semiconductors. Many commercially available IGBTs were found to be overdimensioned for the 5MW, 20kV target system, and better results were obtained with optimized assemblies. When the converter is designed with just a few more modules than absolutely necessary, the total size of the passive components can be reduced drastically, while the power losses increase only marginally. An attractive candidate system is given a closer look, for which a peak power-conversion efficiency of 99.3% is predicted (not including power losses in the line-filter and in the dc-dc converters to interface the batteries).

Limiting Factors of the Safe Operating Area for Power Devices

Abstract: This paper gives an overview about different failure mechanisms which limit the safe operating area of power devices. It is demonstrated how the device internal processes can be investigated by means of device simulation. For instance, the electrothermal simulation of high-voltage diode turn-off reveals how a backside filament transforms into a continuous filament connecting the anode and cathode and how this can be accompanied with a transition from avalanche-induced into thermally driven carrier generation. A similar current destabilization may occur during insulated-gate bipolar transistor turn-off with a high turn-off rate, when the channel is closed quickly leading to strong dynamic avalanche. It is explained how the current filamentation depends on substrate resistivity, device thickness, channel width, and switching conditions (gate resistor and overcurrent). Filamentation processes during short-circuit events are discussed, and possible countermeasures are suggested. A mechanism of a periodically emerging and vanishing filament near the edge of the chip is presented. Examples on current destabilizing effects in gate turn-off thyristors, integrated gate-commutated thyristors, and metal-oxide-semiconductor field-effect transistors are given, and limitations of current device simulation are discussed.

Mission profile based multi-disciplinary analysis of power modules in single-phase transformerless photovoltaic inverters

Abstract: The popularity of transformerless photovoltaic (PV) inverters in Europe proves that these topologies can achieve higher efficiency (e.g., ≥ 98% has been reported). Along with the advanced power electronics technology and the booming development of PV power systems, a long service time (e.g. 25 years) has been set as a main target and an emerging demand from the customers, which imposes a new challenge on grid-connected transformerless inverters. In order to reduce maintenance cost, it is essential to predict the lifetime of the transformerless PV inverter and its components based on the mission profiles - solar irradiance and ambient temperature. In this paper, a mission profile based analysis approach is proposed and it is demonstrated by three main single-phase transformerless PV inverters - Full-Bridge (FB) with bipolar modulation scheme, the FB inverter with DC bypass (FB-DCBP) topology and the FB inverter with AC bypass leg (highly efficient and reliable inverter concept, HERIC inverter). Since the thermal stress is one of the most critical factors that induce failures, the junction temperatures on the power devices of the three topologies are analyzed and compared by considering the mission profiles. The lifetimes of these topologies are discussed according to the thermal performance and the power losses on the switching devices are also compared.

Novel High-Efficiency Three-Level Stacked-Neutral-Point-Clamped Grid-Tied Inverter

Abstract: In recent years, high photovoltaic array voltage up to 1000 V and transformerless grid-tied inverter have been increasingly researched and applied to elevate the inverter and the dc power collection efficiency. With the same reasons, a three-level neutral point clamped (3L-NPC) inverter featuring low power device voltage stress and low leakage current becomes increasingly attractive. In this paper, the operation and the features of a novel grid-tied 3L-NPC are presented. The proposed topology is a derivative of the three-level stacked neutral point clamped (3L-SNPC) structure. However, compared with the conventional 3L-SNPC and its pulse width modulation (PWM) strategy, the new topology with novel PWM strategy features completely inactive intrinsic body diodes. Furthermore, only two outer power devices are working with switching frequency, while the other four Insulated Gate Bipolar Transistors (IGBTs) are actually with the grid frequency. Therefore, the relatively high switching frequency is selected to reduce the inverter output filter inductance. A hybrid CoolMosfet and IGBT power module configuration is also proposed based on the new PWM strategy. The calculation shows that the total power device losses are reduced. The experimental results are illustrated in this paper to confirm the operation of the proposed topology and controller.