Jong-Ho Lee

TL;DR: In this article, the degradation of the electrical characteristics of SOI MOSFETs with STI structure is found to be dependent on the device size, and the degradation is due to decreased mobility due to the interface roughness between STI and channel formed during the dry etch process, and becomes significant with the decrease in channel width and increase in channel length.

TL;DR: As a synaptic device, TFT-type NOR flash memory cell shows reasonable weight levels, and a new pulse scheme is designed for mimicking spike-rate-dependent plasticity (SRDP) algorithm which helped the network to classify completely overlapped patterns in succession.

TL;DR: In this article, the cause of drain current (ID) drift in graphene field effect transistors is analyzed and a method to suppress the drift is proposed by analyzing ID-time characteristics, a condition of reasonable gate, drain and source biases (VG, VD, and VS) is proposed to suppress ID drift.

TL;DR: Analysis of program inhibition in bulk fin SONOS flash memory devices with a variation of fin body width shows relationship between the fin width and the program disturbance characteristics can be useful in memory design and optimization.