scispace - formally typeset
J

Jong-Ho Lee

Researcher at Seoul National University

Publications -  1054
Citations -  14204

Jong-Ho Lee is an academic researcher from Seoul National University. The author has contributed to research in topics: Field-effect transistor & Threshold voltage. The author has an hindex of 45, co-authored 928 publications receiving 11335 citations. Previous affiliations of Jong-Ho Lee include Massachusetts Institute of Technology & Kyungpook National University.

Papers
More filters
Journal ArticleDOI

Low-Frequency Noise Properties in Double-Gate Amorphous InGaZnO Thin-Film Transistors Fabricated by Back-Channel-Etch Method

TL;DR: In this article, the authors investigated the low-frequency noise properties of double-gate (DG) amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) in the framework of correlated carrier number-mobility fluctuation.
Journal ArticleDOI

Trapidil, a platelet-derived growth factor antagonist, inhibits osteoclastogenesis by down-regulating NFATc1 and suppresses bone loss in mice.

TL;DR: It is demonstrated that trapidil abrogates RANKL-induced calcium oscillation and Pim-1 expression required for NFATc1 induction, thereby inhibiting osteoclastogenesis.
Journal ArticleDOI

Tristate Memory Using Ferroelectric–Insulator–Semiconductor Heterojunctions for 50% Increased Data Storage

TL;DR: In this article, a tristate memory function for high-density FeRAM is presented that uses stacked ferroelectric Pb(Zr,Ti)O3/Al2O3 layers with Pt top and bottom electrodes, which can be used to increase the memory density by 50% compared to conventional FeRAM at a given cell size.
Journal ArticleDOI

Recombinant human nerve growth factor (rhNGF-β) gene transfer promotes regeneration of crush-injured mental nerve in rats

TL;DR: Recombinant human nerve growth factor gene transfer promoted regeneration of crush-injured mental nerve and showed improved sensory recovery in the NGF-Ad group.
Journal ArticleDOI

Design and Optimization of Triple-k Spacer Structure in Two-Stack Nanosheet FET From OFF-State Leakage Perspective

TL;DR: In this article, a triple-k spacer structure with three spacer regions consisting of two inner spacers (inner spacer 1 and inner spacer 2) formed by two atomic layer deposition (ALD) processes leveraging the inner Spacer formation-process method and outer spacer process of stack gate-all-around (GAA) process is proposed.