J
Jong-Ho Lee
Researcher at Seoul National University
Publications - 1054
Citations - 14204
Jong-Ho Lee is an academic researcher from Seoul National University. The author has contributed to research in topics: Field-effect transistor & Threshold voltage. The author has an hindex of 45, co-authored 928 publications receiving 11335 citations. Previous affiliations of Jong-Ho Lee include Massachusetts Institute of Technology & Kyungpook National University.
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Clinical validation of the 3-dimensional double-echo steady-state with water excitation sequence of MR neurography for preoperative facial and lingual nerve identification
TL;DR: Evaluating the clinical usefulness of magnetic resonance neurography using the 3-dimensional double-echo steady-state with water excitation (3D-DESS-THE AUTHORS) sequence confirmed that the preoperative localization of the facial and lingual nerves was feasible and contributed to surgical planning for the parotid area and Lingual nerve.
Swelling-activated Cl- Channels in Human Salivary Gland Acinar Cells
TL;DR: This work was supported by the Korea Science & Engineering Foundation (KOSEF) grant funded by Korea government (R13-2008-008-01001-0) through the Oromaxillofacial Dysfunction Research Center for the Elderly at Seoul National University.
Student Paper Comparative Study of p + /n + gate Modified Saddle MOSFET and p + /n + gate Bulk FinFETs for Sub-50 nm DRAM Cell Transistors
TL;DR: In this paper, a p + /n + gate modified Saddle MOSFET and p + n + gate bulk FinFET are compared in terms of scalability and show electric field profiles.
Journal Article
Accuracy Verification of Optical Tracking System for the Maxillary Displacement Estimation by Using of Triangulation
TL;DR: The accuracy of the optical tracking system with a newly designed head tracker can be a useful method in further orthognathic navigation surgery even though the average error is higher than 2.0 mm.
Journal ArticleDOI
Hardware-Based Ternary Neural Network Using AND-Type Poly-Si TFT Array and Its Optimization Guideline
TL;DR: In this paper , the authors design hardware-based ternary neural networks (TNNs) using TFT-type synaptic devices, and the effects of leakage currents are analyzed on the inference accuracy of TNNs.