Jong-Ho Lee

TL;DR: In this paper, a learning rule based on a back-propagation (BP) algorithm was proposed for a hardware-based deep neural network using electronic devices that exhibit discrete and limited conductance characteristics.

TL;DR: In this article, the authors proposed a systematic method to separate the hole trapping from measured V1 shift, thus giving the ideal interface trap generation behavior without measurement disturbance, and demonstrated three stages of interface trap generator with the analytical H-H2 NBTI reaction-diffusion model, and verified the hole trap with voltage-enhanced and temperature-insensitive properties.

TL;DR: In this article, a high performance amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistor (TFT) inverter is implemented using the enhancement mode driver and the depletion mode load.

TL;DR: A fully depleted double-gate 1-T DRAM cell device which has SONOS type storage node on control gate for nonvolatile memory function is investigated and could be a very promising candidate for a future high density and high performance IT-DRAM cell.

TL;DR: A simple, scalable, large-area scheme that achieves this goal through microwave irradiation of aligned SWNTs grown on quartz substrates, resulting in a purity of s-SWNTs that corresponds, quantitatively, to at least to 99.9925% and likely significantly higher.