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Institution

College of Engineering, Pune

About: College of Engineering, Pune is a based out in . It is known for research contribution in the topics: Computer science & Sliding mode control. The organization has 4264 authors who have published 3492 publications receiving 19371 citations. The organization is also known as: COEP.


Papers
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Proceedings ArticleDOI
01 Oct 2015
TL;DR: In this article, variable frequency drive for 3 phase AC induction motor and energy conservation achieved using Variable frequency Drive for different types of loads. And this energy conservation is achieved by using variable frequency drives at some extent.
Abstract: The AC induction motors converts the electrical energy into mechanical and other usable forms. Therefore, for this purpose about two third of the electrical energy is fed to motors in world. So energy conservation for motors is the major constraint. And this energy conservation is achieved by using variable frequency drive at some extent. Generally, there are three types of major load applications classified as 1. Variable torque type load 2. Constant torque type load 3. Constant Horsepower type load This paper about variable frequency drive for 3 phase AC Induction motor and energy conservation achieved using Variable frequency drive for different types of loads.

8 citations

DOI
20 Sep 2021
TL;DR: In this article, the sliding mode controller (SMC)-based field oriented control (FOC) for brushless direct current (BLDC) motor, and in later part investigated the speed and position estimation using higher order sliding mode observer (HOSMO), which may come as a solution for sensorless operation.
Abstract: This work propose the sliding mode controller (SMC)-based field oriented control (FOC) for brushless direct current (BLDC) motor, and in later part investigated the speed and position estimation using higher order sliding mode observer (HOSMO), which may come as a solution for sensorless operation. The main idea of this work is to improve the dynamic response and reduce torque ripples in the BLDC motor with the proposed techniques. Speed tracking performance has been analyzed with different statistical performance and torque ripples with percentage variation with respect to the applied external torque. Further, rotor position and speed estimation using HOSMO is validated against real-time measured values and checked for percentage error. To validate the results of proposed approach, the SMC with HOSMO is implemented on a STM32Nucleo-144 development board and its performance is analyzed by hardware-in-the-loop co-simulations for reference tracking. Results shows that the designed SMC is a promising candidate for the BLDC motor control, with characteristics of improved speed tracking response for a wide speed range with minimum values for error performance indices and torque ripples are reduced by 5.84%.

8 citations

Journal ArticleDOI
TL;DR: In this paper, the authors presented the thermodynamic analysis of diesel engine powered trigeneration system considering the actual engine data of 200 kVA engine systems, and compared the performance of two different types of trigenerations, one with a single chiller and another with two chiller.

8 citations

Proceedings ArticleDOI
05 Sep 2012
TL;DR: This paper proposes a rolled architecture for the implementation of the 128 bit AES (Advanced Encryption Standard) algorithm that employs BRAMs available on the device for T-Boxes and for storing round keys generated in the Key expansion module.
Abstract: This paper proposes a rolled architecture for the implementation of the 128 bit AES (Advanced Encryption Standard) algorithm. The design comprises of modified T-boxes. The efficient utilization of area and the increase in speed up to 1.454 Gbps is achieved on Xilinx's Virtex-4 Field Programmable Gate Array (FPGA). The clock frequency of the design is 113.63 MHz. By using 24 bit words instead of 32 bits words in T-boxes, memory requirement reduced by 25%. The design employs BRAMs available on the device for T-Boxes and for storing round keys generated in the Key expansion module. The latency achieved is 10 clock cycles and for every new key same amount of clock cycles are required before start of encryption.

8 citations


Authors

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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202227
2021491
2020323
2019325
2018373
2017334