Vignan University

About: Vignan University is a education organization based out in Guntur, Andhra Pradesh, India. It is known for research contribution in the topics: Computer science & Control theory. The organization has 1138 authors who have published 1381 publications receiving 7798 citations.

Green pest management practices for sustainable buildings: Critical review:

Abstract: Green pest management is an environmental-friendly pest management that helps to control pests and reduces harmful use of pesticides. Pests like woodworms, longhorn beetles, fruit flies, spiders, termites and paper mites in the buildings degrade the carpets, leather, wood, cloth, food, utensils and so on. They can spread diseases, damage properties and contaminate food in our home. So, green pest management has been developed in buildings to avoid degradation and protect human health and surrounding environment. Green pest management is a relatively new concept. Its practices help to keep our building green. It includes sanitation, management, biological control, least toxic chemical pesticides and minimum use of chemicals and avoids killing of non-target species by spraying in target locations. Green Pest Control India Pvt Ltd in Borivali East, Mumbai; Herbal Pest Control Services in Bengaluru, Karnataka, India; Green Pest Management by Johnsons group in Hong Kong; Ehrlichs Green Pest control service in Pennsylvania; Eco Smart Technologies in United States; Green Pest Services Ecofriendly and Organic Pest Control at St. Lucie and Martin country and so on are providing service. This green pest management is also included in green building certification rating system for all sustainable buildings. This article describes the impact of pests on the environment and sustainable pest management practices in existing homes. It is an innovative service provider with a mission of creating a 'happy community' as we value and respect the various needs of our customers.

Efficient real time hardware co-simulation for image enhancement applications

Abstract: Image enhancement techniques improve the visibility of the images. Enhancement results, the output image is more suitable for a specific application rather than input image. It is used in many image processing applications like medical imaging, SONAR and RADAR as a preprocessing step. Hence this paper presents the hardware co-simulation and implementation of image enhancement algorithms into FPGA. Recent improvements in synthesis tools for Simulink suggest a feasible high-level approach to algorithm implementation for embedded DSP systems. The proposed work gives the implementation of efficient edge detection, negative image and image thresholding on Field Programmable Gate Array (FPGA) using Matlab and Simulink.

Energy Efficient Cluster Based Routing Protocol for wireless sensor networks

Abstract: This paper elucidates an Energy Efficient Cluster Based Routing Protocol (EECBRP) for wireless sensor networks. It accomplishes ameliorate performance by means of network lifetime and energy efficiency. It is used to pile up data from scattered sensor nodes and transmit the same to a base station. EEBCRP is designed to shore up the remote monitoring in sensor networks, periodically. Major issues here are, cluster head (CH) selection, forming cluster scheme and a routing algorithm for the data transmission between cluster heads and the base station. The cluster formation is carried out by exchanging messages between member nodes and the cluster head. The key function of the cluster head is rotated at predefined interval to assure even distribution of energy among the sensor nodes. The routing is based on the flawless hauling range data transmission between base station and cluster heads using multi-hop. Its performance is figured out by comparing with LEACH routing protocol using NS2. It ensures 20% more life time than LEACH protocol.

Statistical Analysis of Arbiter Physical Unclonable Functions Using Reliable and Secure Transmission Gates

Abstract: Physical Unclonable Functions (PUFs) are a set of emerging technologies to deal with cloning, Intellectual Property (IP) protection, and security against reverse engineering schemes to restrict the over production of semiconductor chips. Delay based PUFs represent an inviting option due to minimal space circuitry over conventional type arbiter PUF. This paper presents a novel transmission gate based arbiter PUF for authentication of the electronic hardware systems. These PUFs have been widely used as security primitives for device authentication and identification. By measuring the statistical parameters using Monte Carlo analysis we demonstrated that the proposed design significantly enhances the performance of the arbiter PUF. Our arbiter PUF produced 48.5% of uniqueness for 64 bit challenge pair, and their reliability was demonstrated across different environmental variations.