Showing papers on "Capacitor published in 1999"

MOS capacitance measurements for high-leakage thin dielectrics

Abstract: As oxide thickness is reduced below 2.5 nm in MOS devices, both series and shunt parasitic resistances become significant in capacitance-voltage (C-V) measurements. A new technique is presented which allows the frequency-independent device capacitance to be accurately extracted from impedance measurements at two frequencies. This technique is demonstrated for a 1.7 nm SiO/sub 2/ capacitor.

Method and apparatus for wireless powering and recharging

Abstract: An arrangement is provided for charging a charge storage device by placing the charge storage device in an RF or microwave radiation field. One or more antennas which receive the radiated RF electromagnetic field are placed on the charge storage device. Rectifiers connected to the antennas rectify the received RF electromagnetic field an produce a DC output current which is used to charge the charge storage device. The charge storage device may be a battery or a capacitor and may form an integral part of an electronic device. The same RF field that charges the charge storage device can also be employed to communicate data to transponders which may be associated with computing devices.

Power distribution system design methodology and capacitor selection for modern CMOS technology

Abstract: Power systems for modern complementary metal-oxide-semiconductor (CMOS) technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor equivalent series resistance (ESR) and ESL are extremely important parameters in determining how many capacitors are required. SPICE models are then analyzed in the time domain to find the response to load transients.

Ferroelectric Tuning of Planar and Bulk Microwave Devices

Abstract: Benefits of ferroelectric component applications at microwaves is discussed. Experience recently gained in the high-temperature film-production technology has been used for obtaining high-quality ferroelectric tunable components. The disk made from bulk SrTiO3 single crystal covered with double-sided YBa2Cu3Y7 films was used as a high-quality TM010 mode tunable resonator. Planar structures containing thin film ferroelectric layers: planar capacitor, sandwich capacitor, coplanar line, and fin line have been studied. Modeling dielectric response of low-temperature incipient ferroelectrics (SrTiO3, KTaO3) has been applied for simulation of tunable planar structures. The quality factor of a tunable component (QFCT) is suggested to characterize the validity of the component for practical applications. The high-quality planar capacitors are pioneered for the applications. The wide frequency band fin line phase shifter has been studied and simulated. The prospects for applications of ferroelectric planar structures at room temperature is discussed.

CMOS imager with storage capacitor

Abstract: A CMOS imager having an improved signal to noise ratio and improved dynamic range is disclosed. The CMOS imager provides improved charge storage by fabricating a storage capacitor in parallel with the photocollection area of the imager. The storage capacitor may be a flat plate capacitor formed over the pixel, a stacked capacitor or a trench imager formed in the photosensor. The CMOS imager thus exhibits a better signal-to-noise ratio and improved dynamic range. Also disclosed are processes for forming the CMOS imager.

Adaptive SVM to compensate DC-link voltage ripple for four-switch three-phase voltage-source inverters

Abstract: An adaptive space vector modulation (SVM) approach to compensate the DC-link voltage ripple in a B4 inverter is proposed and examined in detail. The theory, design, and performance of this pulsewidth modulation (PWM) method are presented, and the method effectiveness is demonstrated by extensive simulations and experiments. High-quality output currents are guaranteed by this approach even with substantial DC-voltage variations that might be caused by an unbalanced AC supply system, the diode rectification of the line voltages, and circulation of one output phase current through the split capacitor bank. The application of this approach to induction machine drives is also discussed. It is concluded that the DC-voltage ripple effect on the B4 inverter output can be minimized by an adaptive SVM algorithm with the advantage of improving the response of the DC-link filter and the output quality of the inverter becoming high.

A Capacitance Standard Based on Counting Electrons

Abstract: A capacitance standard based directly on the definition of capacitance was built. Single-electron tunneling devices were used to place N electrons of charge e onto a cryogenic capacitor C, and the resulting voltage change ΔV was measured. Repeated measurements ofC = Ne/ΔV with this method have a relative standard deviation of 0.3 × 10–6. This standard offers a natural basis for capacitance analogous to the Josephson effect for voltage and the quantum Hall effect for resistance.

Amorphous lanthanide-doped TiOx dielectric films

Abstract: Addition of Nd, Tb, or Dy to amorphous Ti–O thin films is found to improve the dielectric properties of the films. Specifically, substitution of 10–30 at. % of the dopant for Ti is found to dramatically decrease the leakage current, increase the breakdown voltage, and yet retain the relatively high dielectric constant e=50–110 in films 35 nm thick. The high-specific-capacitance a-Ti1−yMyOx films thus produced are suitable for incorporation into future Si integrated circuit technology, e.g., for storage capacitors in semiconductor memory circuits.

Buck and boost switched capacitor gain stage with optional shared rest state

Abstract: A structure and process are provided for converting DC-DC voltages, which allows both buck and boost conversion utilizing a single switched capacitor array. In one embodiment of this invention, the switched capacitor array comprises multiple gain blocks, where the gain blocks are identical and stacked upon each other. The switches and capacitors are configured so that various combinations of series and parallel capacitor connections are possible, and thus both buck and boost conversions are attainable with one switched capacitor array. Other embodiments of the present invention use multiple gain blocks, configured such that the capacitor in each gain block can be connected to ground. As a result, a single charge state for a range of desired gains can be configured for use with a shared or common rest state, i.e., a capacitor configuration which is the same regardless of the desired gain. In the charge state, selected capacitors are configured in series for the desired gain setting, while in the shared rest state, all the capacitors are configured in parallel from the output to the input. Because a shared rest state is used, the correct charge is always transferred at the desired gain with a single switched capacitor array.

Active matrix display device

Abstract: In an active matrix display device, a circuit including at least five thin film transistors (TFTs) which are provided with an approximately M-shaped semiconductor region for a single pixel electrode and gate lines and a capacitances line which cross the M-shaped semiconductor region, is used as a switching element. Each of the TFT have offset regions and lightly doped drain (LDD) regions. Then, by supplying a selection signal to the gate lines, the TFTs are operated, thereby writing data to the pixel, while a suitable voltage is supplied to the capacitance line, a channel is formed thereunder and it becomes a capacitor. Thus the amount of discharge from the pixel electrode is reduced by the capacitor.

(Ba,Sr)TiO 3 dielectrics for future stacked- capacitor DRAM

Abstract: Thin films of barium-strontium titanate (Ba,Sr)TiO3 (BSTO) have been investigated for use as a capacitor dielectric for future generations of dynamic random-access memory (DRAM). This paper describes progress made in the preparation of BSTO films by liquid-source metal-organic chemical vapor deposition (LS-MOCVD) and the issues related to integrating films of BSTO into a DRAM capacitor. Films of BSTO deposited on planar Pt electrodes meet the electrical requirements needed for future DRAM. The specific capacitance and charge loss are found to be strongly dependent on the details of the BSTO deposition, the choice of the lower electrode structure, the microstructure of the BSTO, the post-electrode thermal treatments, BSTO dopants, and thin-film stress. Films of BSTO deposited on patterned Pt electrodes with a feature size of 0.2 µm are found to have degraded properties compared to films on large planar structures, but functional bits have been achieved on a DRAM test site at 0.20-µm ground rules. Mechanisms influencing specific capacitance and charge loss of BSTO films are described, as are the requirements for the electrode and barrier materials used in stacked-capacitor structures, with emphasis given to the properties of the Pt/TaSi(N) electrode/barrier system. Major problems requiring additional investigation are outlined.

Films doped with carbon for use in integrated circuit technology

Abstract: The invention pertains to films comprising silicon, oxygen and carbon and the use of the films in integrated circuit technology, such as capacitor constructions, DRAM constructions, semiconductive material assemblies, etching processes, and methods for forming capacitors, DRAMs and semiconductive material assemblies.

Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides

Abstract: The electrical characteristics (C-V and I-V) of n+ - and p+ -polysilicon-gated ultrathinoxide capacitors and FETs were studied extensively to determine oxide thickness and to evaluate tunneling current. A quantum-mechanical model was developed to help understand finite inversion layer width, threshold voltage shift, and polysilicon gate depletion effects. It allows a consistent determination of the physical oxide thickness based on an excellent agreement between the measured and modeled C-V curves. With a chip standby power of ≤0.1 W per chip, direct tunneling current can be tolerated down to an oxide thickness of 15-20 A. However, transconductance reduction due to polysilicon depletion and finite inversion layer width effects becomes more severe for thinner oxides. The quantum-mechanical model predicts higher threshold voltage than the classical model, and the difference increases with the electric field strength at the silicon/oxide interface.

Injection-controlled size effect on switching of ferroelectric thin films

Abstract: The effect of near-by-electrode charge injection on switching of a thin film ferroelectric capacitor is theoretically analyzed. We develop a model of switching affected by charge injection through a surface dielectric layer to calculate the coercive field of the capacitor as a function of both film thickness and maximal polarization of the switching cycle. The predictions of the model are verified by electrical measurements on sol–gel derived Pb(Zr, Ti)O3 thin films of thickness ranging from 100 to 1000 nm with Pt electrodes. The model gives a good description of the size effect on switching in the Pt/Pb(Zr, Ti)O3/Pt system and enables an explanation for a much smaller magnitude of this effect in Bi-containing and oxide–electrode thin films.

Wireless electrostatic charging and communicating system

Abstract: The wireless electrostatic charging and communicating system includes an electrostatic reader, an electrostatic charger and an electrostatic rechargeable device or electrostatic transceiver such as such as a smart card or radio frequency identification (RFID) card without requiring physical contact to electrodes. The electrostatic system is capacitance based and the charging and communicating occurs over capacitively coupled electrostatic electrodes or electrostatic electrodes. The electrostatic rechargeable device or transceiver includes a charge receiver and an energy storage means, for being charged or communicated with in the electrostatic system. The energy storage means may be any energy storage device including a rechargeable battery or capacitor. In a second embodiment, the electrostatic rechargeable device or transceiver includes an electrostatic charge receiver and an electromagnetic charge receiver with the energy storage means so that it may be alternatively charged or communicated with in an electrostatic system or an electromagnetic system for compatibility in either system.

Hysteretic regulator and control method having switching frequency independent from output filter

Abstract: A DC to DC power converter (58) and method of controlling the DC to DC power converter (58). The converter (58) has a first switch (S 1 ) coupled to a second switch (S 2 ). The converter (58) is adapted to receive an input voltage V in , generate an output voltage V out , and operate at a switching frequency. A hysteretic mode control circuit (52) includes a first circuit generating a ramp signal at input (56) for controlling the converter (58). The first circuit includes a first capacitor (C 1 ) with the ramp signal generated at an end of the first capacitor (C 1 ). The hysteretic mode control circuit (52) is coupled to the first (S 1 ) and second (S 2 ) switches, where the switching frequency of the first and second switches is dependent upon the ramp signal (56) determined by the value of the components of the first circuit rather than on the voltage from the output filter of the DC to DC power converter. The invention is particularly useful for applications such as DSPs and mixed signal or analog circuits.

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

Abstract: High-frequency capacitance-voltage (C-V) measurements have been made on ultrathin oxide metal-oxide-semiconductor (MOS) capacitors. The sensitivity of extracted oxide thickness to series resistance and gate leakage is demonstrated. Guidelines are outlined for reliable and accurate estimation of oxide thickness from C-V measurements for oxides down to 1.4 nm.

High dielectric constant and tunability of epitaxial srtio3 thin film capacitors

Abstract: The dielectric and insulating properties of epitaxial SrTiO3(STO) thin film capacitors were studied. The films were grown by inverted cylindrical magnetron sputtering in the radio frequency mode on (100) STO substrates which were covered with a (001)-oriented YBa2Cu3O7−x (YBCO) layer as a ground electrode. As a top electrode we used YBCO or Au thin films. A high dielectric constant, e, of up to 5000 was observed at T=80 K. The capacitors revealed a large tunability, i.e., a nonlinear e(E) dependence, with respect to voltage biasing. By applying 3 V, e decreased to 1000 which was 20% of its maximum value. The frequency dependence of e, the temperature dependence of the dielectric loss factor, tan δ, and the direct currency conductivity reflected that variable range hopping via localized states was present and dominated the conduction process in the STO films at low temperatures. The field strength for the electrical breakdown amounted to 300 kV/cm even for rather thin films with a thickness of about 40 nm....

Capacitor placement in radial distribution systems for loss reduction

Abstract: Reduction of I/sup 2/R loss in distribution systems is very essential to improve the overall efficiency of power delivery. The I/sup 2/R loss can be separated into two parts based on the active and reactive components of branch currents. The paper presents a method of minimising the loss associated with the reactive component of branch currents by placing shunt capacitors. This method first determines a sequence of nodes to be compensated by capacitors. The size of the optimal capacitor at the compensated nodes is then determined by optimising the loss saving equation with respect to the capacitor currents. The performance of the proposed method was investigated on two distribution systems consisting of 15 and 33 buses and it was found that a significant loss saving can be achieved by placing optimal capacitors in the system.

Pressure sensor with increased sensitivity for use with an implantable medical device

Abstract: An apparatus and method for obtaining pressure data using a body implantable pressure sensor includes a measurement capacitor which is responsive to pressure changes of a body fluid. Non-constant, multiple current source charging of the measurement capacitor provides for a significant increase in sensitivity to conditions of pressure of a body fluid. Pressure data is obtained by charging the measurement capacitor at a first charge rate during a first charge period of an integration cycle and, during a second charge period of the integration cycle, charging the measurement capacitor at a second charge rate. The first charge rate is preferably greater than the second charge rate. The duration of the first and second charge periods may be varied. A signal indicative of a pressure change of a body fluid imparted to the measurement capacitor is produced by the pressure sensor. The signal may be a signal indicative of a change in a time of integration. The signal, indicative of a time of integration, has a sensitivity to pressure changes which is greater than a mechanical capacitive sensitivity of the measurement capacitor to such pressure changes. The signal may alternatively be a signal indicative of a change in capacitance of the measurement capacitor, such as a voltage signal, or a signal having a duty cycle indicative of the pressure change. The pressure sensor may be implemented in a pacemaker, a pacemaker/cardioverter/defibrillator (PCD) or a hemodynamic monitor.

Electric-field penetration into metals: consequences for high-dielectric-constant capacitors

Abstract: A consequence of the finite electronic screening length in metals is that electric fields penetrate short distances into the metal surface. Using a simple, semiclassical model of an idealized capacitor, we estimate the capacitance correction due to the distribution of displacement charge in the metal electrodes. We compare our result with experimental data from thin-film high-dielectric-constant capacitors, which are currently leading contenders for use in future high-density memory applications. This intrinsic mechanism contributes to the universally-seen decrease in measured dielectric constant with capacitor film thickness.

Scaling of ferroelectric properties in thin films

Abstract: A fundamental issue in ferroic systems (ferromagnetic and ferroelectric) is the scaling of the order parameter (magnetization or polarization) with size Specifically, in ferroelectric thin films, deviations in the polarization can occur due to: (i) competition between thermal vibrations and the correlation energy (which aligns the dipoles) and (ii) damage during fabrication These deviations will have a profound impact on the performance of the next generation of high-density nonvolatile memories based on the spontaneous polarization We have combined approaches, namely, focused ion-beam milling to define submicron capacitors and scanning force microscopy to examine the scaling of the fundamental ferroelectric response of these capacitors We find that the capacitors exhibit ferroelectric properties for lateral dimensions down to at least 100 nm, suggesting that memories with densities in the range of 4–16 Gbits can be successfully fabricated

Method for fabricating small-size two-step contacts for word-line strapping on dynamic random access memory (DRAM)

Abstract: A method using a two-step contact process for making word-line strapping on DRAM devices was achieved. The method replaces a single-step contact process in which it is difficult to etch the smaller contact openings. After partially completing the DRAM cells by forming gate electrodes and word lines having a first hard mask, a planar first insulating layer is formed. Capacitor node contact openings are etched and capacitors with a protective second hard mask are completed. A thin first photoresist mask with improved resolution is used to etch small first contact openings in the first insulating layer to the word lines, while the second hard mask protects the capacitors from etching. Tungsten plugs are formed in the openings, and an interlevel dielectric layer is deposited over the capacitors. A thin second photoresist mask with improved resolution is used to etch second contact openings to the tungsten plugs. The word-line strapping for the DRAM is completed by forming tungsten plugs in the second contact openings. Since the tungsten plugs are formed after forming the capacitors, they are not subjected to high-temperature processing that could adversely affect the DRAM devices. The two thin photoresist masks replacing a thicker photoresist mask used in the single-step process allow smaller contact openings to be etched.

Reliable, modular, production quality narrow-band high rep rate F2 laser

Abstract: The present invention provides a reliable modular production quality excimer laser capable of producing 10 mJ laser pulses in the range of 1000 Hz to 2000 Hz or greater. Replaceable modules include a laser chamber (211); a pulse power system comprised of three modules; an optical resonator comprised of a line narrowing module (206) and an output coupler module (216); a wavemeter module (213), an electrical control module (205), a cooling water module (203) and a gas control module (202). Improvements in the pulse power unit to produce faster rise time and improved pulse energy control include: sn increased capacity high voltage power supply with a voltage bleed-down circuit for precise voltage trimming, an improved commutation module (209) that generates a high voltage pulse from the capacitors charged by the high voltage power supply (20) and amplifies the pulse voltage 23 times with a very fast voltage transformer having a secondary winding consisting of a single four-segment stainless steel rod. The compression head (207) saturable inductor greatly reduces the quantity of oil required and virtually eliminates the possibility of oil leakage.

RF MEMs variable capacitors for tunable filters

Abstract: () ABSTRACT: An RF MEMs microelectromechanical system variable capacitor has been demonstrated with a 22:1 tuning range, tuning from 1.5 to 33.2 pF of capacitance. This capacitor was constructed using bistable MEMs membrane capacitors with individual tuning ranges of 70:1 to 100:1, control voltages in the 30-55 V range, switching speeds less than 10 mS, and operating frequencies as high as 40 GHz. These devices may eventually provide a viable alternative to electronic varactors with improved tuning range and lower loss. Q 1999 John Wiley & Sons, Inc. Int J RF and Microwave CAE 9: 362)374, 1999.

Mathematical modeling of electrochemical capacitors

Abstract: Due to the high-rate capability of electrochemical capacitors (EC), they are considered excellent candidates for use in high-power applications such as load leveling the power sources in electric vehicles. 1-3 Electrochemical capacitors having large capacitance per gram of active material are of two types, 1 (i) double-layer capacitors and (ii) pseudocapacitors. The energy in the former device is stored across the double layer formed at the interface between an electronically conducting substrate and the electrolyte. The capacitance of a double layer is typically in the range of 10 to 40 mF per cm 2 of surface area. 4 Therefore, to achieve the requisite energy densities, highsurface-area materials such as activated carbon are used. 5 In contrast, pseudocapacitors are based on faradaic reactions that exhibit a current-voltage response similar to a capacitor. Examples of systems that exhibit faradaic pseudocapacitance are underpotential deposition of H or Pb in monolayers on noble metals and redox reactions of microporous transition metal hydrous oxides such as RuO 2 1 and NiO. 6,7 To produce cost-effective materials with the desired electrochemical performance, a systematic approach is needed to relate process conditions to electrochemical characteristics. Such a systematic approach can be aided by mathematical models for understanding the relationship between electrode structure (e.g., porosity, capacitance, surface area, and thickness) and performance (e.g., energy and power density). The objective of this paper is to use mathematical models to (i) develop a relationship between the physical properties of the cell components and the energy and power density of the device; ( ii) gauge the importance of thermal effects on the performance of these devices; and (iii) develop an electroanalytical tool to probe fundamental properties of new materials in advanced devices. Tasks (i) and (ii) were achieved by solving the governing equation under constant-current operation, while task ( iii) was achieved by simulating electrochemical impedance spectroscopy. This paper modifies the constant-current model developed by Farahmandi 8 for calculating the energy and power densities of the cell as a function of design parameters and operating conditions. The model has also been used to simulate the temperature rise in the cell during constant-current cycling. There are numerous models dealing with the double-layer formation in porous electrodes in the literature. These models can be divided into two categories: (i) models used to simulate the charging of the double layer 9-13 and (ii) models used to simulate the performance of electrochemical capacitors. 8,14,15 Posey and Morozumi 9

Novel zero-voltage and zero-current-switching full-bridge PWM converter using a simple auxiliary circuit

Abstract: A novel zero-voltage and zero-current-switching (ZVZCS) full-bridge pulsewidth modulation converter is presented to simplify the circuits of the previously presented ZVSCS converters. A simple auxiliary circuit, which consists of one small capacitor and two small diodes, is added in the secondary to provide ZVZCS conditions to primary switches, as well as to clamp secondary rectifier voltage. The additional clamp circuit for the secondary rectifier is not necessary. The auxiliary circuit includes neither lossy components nor additional active switches, which makes the proposed converter efficient and cost effective. The principle of operation, features, and design considerations are illustrated and verified on a 2.5 kW 100 kHz insulated-gate-bipolar-transistor-based experimental circuit.

Reliable, modular, production quality narrow-band high rep rate ArF excimer laser

Abstract: The present invention provides a reliable modular production quality excimer laser capable of producing 10 mJ laser pulses at 2000 Hz with a full width half, maximum bandwidth of about 0.6 pm or less. Replaceable modules include a laser chamber; a pulse power system comprised of three modules; an optical resonator comprised of a line narrowing module and an output coupler module; a wavemeter module, an electrical control module, a cooling water module and a gas control module. Improvements in the laser chamber permitting the higher pulse rates and improved bandwidth performance include a single upstream preionizer tube and a high efficiency chamber. The chamber is designed for operation at lower fluorine concentration. Important improvements have been provided in the pulse power unit to produce faster rise time and improved pulse energy control. These improvements include an increased capacity high voltage power supply with a voltage bleed-down circuit for precise voltage trimming, an improved commutation module that generates a high voltage pulse from the capacitors charged by the high voltage power supply and amplifies the pulse voltage 23 times with a very fast voltage transformer having a secondary winding consisting of a single four-segment stainless steel rod. A novel design for the compression head saturable inductor greatly reduces the quantity of transformer oil required and virtually eliminates the possibility of oil leakage which in the past has posed a hazard.

Optimal location of phase shifters in the French network by genetic algorithm

Abstract: Series FACTS such as series capacitors or phase shifters, by controlling the power flows in a network, can help reduce the flows in heavily loaded lines, resulting in an increased loadability of the network and a reduced cost of production. The influence of multiple phase shifters on the network flows is complex, because they interact on one another, and the problem of the optimal location is essential. This paper proposes an index for measuring the benefit of a given set of phase shifters. The best location for a set of phase shifters is found by a genetic algorithm for a 36 line test case and for the French network.