Showing papers on "Junction temperature published in 2016"

High Switching Performance of 1700-V, 50-A SiC Power MOSFET Over Si IGBT/BiMOSFET for Advanced Power Conversion Applications

Abstract: Due to wider band gap of silicon carbide (SiC) compared to silicon (Si), MOSFET made in SiC has considerably lower drift region resistance, which is a significant resistive component in high-voltage power devices. With low on-state resistance and its inherently low switching loss, SiC MOSFETs can offer much improved efficiency and compact size for the converter compared to those using Si devices. In this paper, we report switching performance of a new 1700-V, 50-A SiC MOSFET designed and developed by Cree, Inc. Hard-switching losses of the SiC MOSFETs with different circuit parameters and operating conditions are measured and compared with the 1700-V Si BiMOSFET and 1700-V Si IGBT, using same test set-up. Based on switching and conduction losses, the operating boundary of output power and switching frequency of these devices are found out in a dc–dc boost converter and compared. The switching $dv/dts$ and $di/dts$ of SiC MOSFET are captured and discussed in the perspective of converter design. To validate the continuous operation, three dc–dc boost converters using these devices, are designed and tested at 10 kW of power with 1 kV of output voltage and 10 kHz of switching frequency. 1700-V SiC Schottky diode is used as the blocking diode in each case. Corresponding converter efficiencies are evaluated and the junction temperature of each device is estimated. To demonstrate high switching frequency operation, the SiC MOSFET is switched upto 150 kHz within permissible junction temperature rise. A switch combination of the 1700-V SiC MOSFET and 1700-V SiC Schottky diode connected in series is also evaluated for zero voltage switching turn-ON behavior and compared with those of bipolar Si devices. Results show substantial power loss saving with the use of SiC MOSFET.

Junction Temperature Extraction Approach With Turn-Off Delay Time for High-Voltage High-Power IGBT Modules

Abstract: Thermo-sensitive electrical parameter (TSEP) approaches are widely employed in the junction temperature extraction and prediction of power semiconductor devices. In this paper, the turn-off delay time is explored as an indicator of a TSEP to extract the junction temperature from high-power insulated gate bipolar transistor (IGBT) modules. The parasitic inductor $L_{\rm eE}$ between the Kelvin and power emitter terminals of an IGBT module is utilized to extract the turn-off delay time. Furthermore, the monotonic dependence between the junction temperature and turn-off delay time is investigated. The beginning and end point of the turn-off delay time can be determined by monitoring the induced voltage $v_{\rm eE}$ across the inductor $L_{\rm eE}$ . A dynamic switching characteristic test platform for high-power IGBT modules is used to experimentally verify the theoretical analysis. The experimental results show that the dependency between IGBT junction temperature and turn-off delay time is near linear. It is established that the turn-off delay time is a viable TSEP with good linearity, fixed sensitivity, and offers nondestruction on-line IGBT junction temperature extraction.

Advanced Accelerated Power Cycling Test for Reliability Investigation of Power Device Modules

Abstract: This paper presents an apparatus and methodology for an advanced accelerated power cycling test of insulated-gate bipolar transistor (IGBT) modules. In this test, the accelerated power cycling test can be performed under more realistic electrical operating conditions with online wear-out monitoring of tested power IGBT module. The various realistic electrical operating conditions close to real three-phase converter applications can be achieved by the simple control method. Further, by the proposed concept of applying the temperature stress, it is possible to apply various magnitudes of temperature swing in a short cycle period and to change the temperature cycle period easily. Thanks to a short temperature cycle period, test results can be obtained in a reasonable test time. A detailed explanation of apparatus such as configuration and control methods for the different functions of accelerated power cycling test setup is given. Then, an improved in situ junction temperature estimation method using on-state collector–emitter voltage $V_{{\rm CE}\_{\rm ON}}$ and load current is proposed. In addition, a procedure of advanced accelerated power cycling test and test results with 600 V, 30 A transfer molded IGBT modules are presented in order to verify the validity and effectiveness of the proposed apparatus and methodology. Finally, physics-of-failure analysis of tested IGBT modules is provided.

Frequency-Domain Thermal Modeling and Characterization of Power Semiconductor Devices

Abstract: The thermal behavior of power electronics devices has been a crucial design consideration, because it is closely related to the reliability and also the cost of the converter system. Unfortunately, the widely used thermal models based on lumps of thermal resistances and capacitances have their limits to correctly predict the device temperatures, especially when considering the thermal grease and heat sink attached to the power semiconductor devices. In this paper, frequency-domain approach is applied to the modeling of the thermal dynamics for power devices. The limits of the existing RC lump-based thermal networks are explained from a point of view of frequency domain. Based on the discovery, a more advanced thermal model developed in the frequency domain is proposed, which can be easily established by characterizing the slope variation from the bode diagram of the typically used Foster thermal network. The proposed model can be used to predict not only the internal temperature behaviors of the devices but also the behaviors of the heat flowing out of the devices. As a result, more correct estimation of device temperature can be achieved when considering the cooling conditions for the devices.

Application of Kalman Filter to Estimate Junction Temperature in IGBT Power Modules

Abstract: Knowledge of instantaneous junction temperature is essential for effective health management of power converters, enabling safe operation of the power semiconductors under all operating conditions. Methods based on fixed thermal models are typically unable to compensate for degradation of the thermal path resulting from aging and the effect of variable cooling conditions. Thermosensitive electrical parameters (TSEPs), on the other hand, can give an estimate of junction temperature ${T_J}$ , but measurement inaccuracies and the masking effect of varying operating conditions can corrupt the estimate. This paper presents a robust and noninvasive real-time estimate of junction temperature that can provide enhanced accuracy under all operating and cooling conditions when compared to model-based or TSEP-based methods alone. The proposed method uses a Kalman filter to fuse the advantages of model-based estimates and an online measurement of TSEPs. Junction temperature measurements are obtained from an online measurement of the on-state voltage, ${V}_{{\bf CE(ON)}}$ , at high current and processed by a Kalman filter, which implements a predict-correct mechanism to generate an adaptive estimate of ${T_ J}$ . It is shown that the residual signal from the Kalman filter may be used to detect changes in thermal model parameters, thus allowing the assessment of thermal path degradation. The algorithm is implemented on a full-bridge inverter and the results verified with an IR camera.

IGBT Junction Temperature Measurement via Peak Gate Current

Abstract: An electrical method for junction temperature measurement of MOS-gated power semiconductor devices is presented. The measurement method involves detecting the peak voltage over the external gate resistor of an insulated-gate bipolar transistor or mosfet during turn-on. This voltage is directly proportional to the peak gate current, and fluctuates with temperature due to the temperature-dependent resistance of the internal gate resistance. Primary advantages of the method include an immunity to load current variation, and a good linear relationship with temperature. A measurement circuit can be integrated into a gate driver with no disruption to operation and allows autonomous measurements controlled directly via the gate signal. Advantages and disadvantages of the method are discussed.

Remaining Useful Lifetime Estimation for Thermally Stressed Power MOSFETs Based on on -State Resistance Variation

Abstract: The research on noninvasive incipient fault diagnosis of power converters is very critical to avoid strenuous periodic check-ups and costly interruptions. Thermal cycling is one of the main techniques to accelerate the package-related failure progress. In this paper, first, a custom designed accelerated aging platform that can expose multiple discrete power MOSFETs to thermal stress simultaneously is introduced. Based on the collected experimental data, the variation of the on -state resistance is identified as the failure precursor, and an exponential degradation model that fits successfully with the experimental data are developed. The remaining useful lifetime (RUL) of degraded power MOSFETs is estimated through classical least-squares algorithm run on experimental data filtered by Kalman Filter which deals with the measurement noise and model uncertainties. The essential advantage of the proposed method is that it does not require junction temperature information. The RUL estimation with limited field data is demonstrated on a number of experimental results.

A Temperature-Dependent Thermal Model of IGBT Modules Suitable for Circuit-Level Simulations

Abstract: A basic challenge in the insulated gate bipolar transistor (IGBT) transient simulation study is to obtain the realistic junction temperature, which demands not only accurate electrical simulations but also precise thermal impedance. This paper proposed a transient thermal model for IGBT junction temperature simulations during short circuits or overloads. The updated Cauer thermal model with varying thermal parameters is obtained by means of finite-element method (FEM) thermal simulations with temperature-dependent physical parameters. The proposed method is applied to a case study of a 1700 V/1000 A IGBT module. Furthermore, a testing setup is built up to validate the simulation results, which is composed of a IGBT baseplate temperature control unit, an infrared camera with a maximum of 3 kHz sampling frequency, and a black-painted open IGBT module.

The Effect of Electrothermal Nonuniformities on Parallel Connected SiC Power Devices Under Unclamped and Clamped Inductive Switching

Abstract: Nonuniformities in the electrothermal characteristics of parallel connected devices reduce overall reliability since power is not equally dissipated between the devices. Furthermore, a nonuniform rate of operational degradation induces electrothermal variations thereby accelerating the development of failure. This paper uses simulations and experiments to quantitatively and qualitatively investigate the impact of electrothermal variations on the reliability of parallel connected power devices under unclamped inductive switching (UIS) conditions. This is especially pertinent to SiC where small die areas mean devices are often connected in parallel for higher current capability. Measurements and simulations show that increasing the variation in the initial junction temperatures and switching rates between parallel connected devices under UIS reduces the total sustainable avalanche current by 10%. It is seen that the device with the lower junction temperature and lower switching rate fails. The measurements also show that the maximum sustainable avalanche energy for a given variation in junction temperature and switching rate increases with the avalanche duration, meaning that the effect of electrothermal variation is more critical with high power (high current and low inductor) UIS pulses compared with high energy (low current and high inductance) pulses. These results are important for condition monitoring and reliability analysis.

Thermal Modeling of Extreme Heat Flux Microchannel Coolers for GaN-on-SiC Semiconductor Devices

Abstract: Gallium nitride (GaN) high-electron-mobility transistors (HEMTs) dissipate high power densities which generate hotspots and cause thermomechanical problems. Here, we propose and simulate GaN-based HEMT technologies that can remove power densities exceeding 30 kW/cm2 at relatively low mass flow rate and pressure drop. Thermal performance of the microcooler module is investigated by modeling both single- and two-phase flow conditions. A reduced-order modeling approach, based on an extensive literature review, is used to predict the appropriate range of heat transfer coefficients associated with the flow regimes for the flow conditions. Finite element simulations are performed to investigate the temperature distribution from GaN to parallel microchannels of the microcooler. Single- and two-phase conjugate computational fluid dynamics (CFD) simulations provide a lower bound of the total flow resistance in the microcooler as well as overall thermal resistance from GaN HEMT to working fluid. A parametric study is performed to optimize the thermal performance of the microcooler. The modeling results provide detailed flow conditions for the microcooler in order to investigate the required range of heat transfer coefficients for removal of heat fluxes up to 30 kW/cm2 and a junction temperature maintained below 250 °C. The detailed modeling results include local temperature and velocity fields in the microcooler module, which can help in identifying the approximate locations of the maximum velocity and recirculation regions that are susceptible to dryout conditions.

A Physics-Based Improved Cauer-Type Thermal Equivalent Circuit for IGBT Modules

Abstract: A physics-based Cauer-type thermal equivalent circuit (TEC) can be constructed for an insulated-gate bipolar transistor (IGBT) module based on its geometry. In the conventional Cauer-type TEC, each layer of the IGBT module is modeled as a lump with the uniformly distributed temperature. However, this method oversimplified the transient thermal behavior of the IGBT module, leading to unsatisfactory transient junction temperature estimation. Based on a new concept of lumped-capacitance approximation error, this letter proposes a method to determine the number of sublayers that a layer in an IGBT module should be subdivided. For the bulky-baseplate layer, an analytical expression of its thermal impedance is derived and simplified to a first-order transfer function, which can be represented by a thermal resistance and capacitance pair in the TEC. The proposed Cauer-type TEC model is much more accurate than the conventional Cauer-type TEC model for the transient junction temperature estimation of IGBT modules with a slightly increased order only. The improvement of the proposed model over the conventional Cauer-type TEC model is validated by comparing with a finite element analysis model for a commercial IGBT module using simulation studies.

Sensing Power MOSFET Junction Temperature Using Gate Drive Turn-On Current Transient Properties

Abstract: Junction temperature sensing for high-bandwidth power MOSFET junction temperature protection is usually achieved on the power converter’s high power side, by directly monitoring the power switches with additional temperature detectors. This requires special considerations for high voltage, high current, high temperature, and EMI protection. This paper presents a new method applied on the power converter’s low power side (MOSFET gate drive) so that junction temperature sensing can be integrated into MOSFET gate drive. For the purpose of demonstrating MOSFET junction temperature sensing, a push–pull gate drive is applied to a switching current divider circuit. The gate drive turn-on current transient waveform is used for MOSFET junction temperature estimation. A “gate drive-MOSFET” switching dynamic model is implemented indicating the mechanisms of MOSFET gate drive output dynamics. Modeling includes gate-drive push–pull output, gate drive output parasitics, power MOSFET intrinsic parameters, PCB parasitics, and load parasitics. LTSpice simulation of this model is studied and compared with experimental results.

Thermal Stress Analysis and MPPT Optimization of Photovoltaic Systems

Abstract: In the last years, the optimization of the energy harvesting of photovoltaic systems during fast variable irradiance conditions has been an active area of research and of competition among the companies. The proposed fast maximum power point tracking (MPPT) algorithms can produce extremely variable loading of the power semiconductors resulting in a decrease of the system lifetime, which in consequence can nullify the economic advantage of higher energy harvesting. This work analyzes the problem with a deep theoretical and laboratory work. Then, a multiobjective MPPT, which limits the positive temperature gradient and the maximum junction temperature of the power semiconductors, is introduced and fully validated in the laboratory with a mission profile emulating variable irradiance conditions.

Comparison and analysis of short circuit capability of 1200V single-chip SiC MOSFET and Si IGBT

Abstract: Short circuit capability of commercial SiC MOSFETs is analyzed, which is compared with that of commercial Si IGBTs. Junction temperatures during short circuit tests are analyzed in this work. A test bench is designed for short circuit tests of discrete MOSFETs and IGBTs. Commercially available 1200V SiC MOSFETs from Wolfspeed (C2M0080120D) and 1200V Si IGBTs from Infineon (IKW25N120H3) with similar current rating are tested. The short circuit withstand time (t cr ) of the 1200V SiC MOSFET is much shorter than that of the 1200V Si IGBT. A 1-D transient finite element thermal model based on structure parameters is constructed to investigate the junction temperature curves during short circuit. According to the analysis of heat generation, short circuit capability of the SiC MOSFET is mainly restricted by high electric field at the P-N junction and high short circuit current density.

An Improved Thermal Network Model of the IGBT Module for Wind Power Converters Considering the Effects of Base-Plate Solder Fatigue

Abstract: This paper presents an improved thermal network model of insulated-gate bipolar transistor (IGBT) module, which considers the effects of base-plate solder fatigue on the junction temperature of the said module used in wind power converters. First, the coupling thermal structure 3-D finite-element model of the IGBT module is established based on the structure and material parameters of the module used in the wind power converters of a doubly fed induction generator. The junction temperature of the module is investigated at different thermal desquamating degrees of the base-plate solder. Second, the thermal resistance parameters are determined at different desquamating degrees, and the improved thermal network model that considers the effects of the base-plate solder fatigue is established. Finally, the IGBT junction temperature results through the improved thermal network, and the 3-D FEM models are compared.

Power Loss Analysis of Medium-Voltage Three-Phase Converters Using 15-kV/40-A SiC N-IGBT

Abstract: Medium-voltage (MV) silicon carbide (SiC) devices such as the 15-kV SiC N-insulated gate bipolar transistor (IGBT) have better thermal withstanding capability compared with silicon (Si)-based devices. These devices also have lower switching and conduction losses at high switching frequencies and high power levels, respectively. The maximum safe operating junction temperature for the 15-kV SiC IGBT is 175 °C. This enables high power density design of the MV converters using this device. Heat sink with forced air cooling is considered for dissipating the heat generated during converter operation. In this paper, the power loss analysis of three-phase MV converters based on 15-kV/40-A SiC N-IGBT is discussed. The converter thermal analysis is carried out based on the experimental loss data and the continuous heat-run test of the device. It is supported by analytical calculations, PLECS thermal simulations, and FEM simulations in COMSOL Multiphysics software. Hardware prototypes of the converters are developed and the experimental results support the analysis. Experimental results are given for both hard-switched grid-connected converter and soft-switched dual active bridge converter. The paper mainly focuses on the semiconductor losses in the converter.

Study on the lifetime characteristics of power modules under power cycling conditions

Abstract: This study presents a study on non-linear accumulative modelling for power module lifetime estimation in non-accelerated operation. The model focuses on solder fatigue based on monitoring the internal thermal resistance of the module. Initially, the relatively small junction temperature variation (ΔT j) cycles contribute little to the lifetime consumption, but with an initial damage the effect becomes noticeable. The original Coffin–Manson accumulation approach is extended for complex mission profiles. The proposed non-linear accumulation model has three aspects: a Coffin–Manson relationship is first established; the thermal resistance degradation is then used to quantify damage accumulation; the effects of the average junction temperature (T jmean) and ΔT j on the rate of degradation are finally included through the parameters of the non-linear accumulation model which also depends on the effect of the present condition of the module. Experiments demonstrate the phenomena and verify the proposed model.

Comparative study of temperature sensitive electrical parameters (TSEP) of Si, SiC and GaN power devices

Abstract: For high power applications, power modules provide a higher power density than using discrete power devices due to improved thermal performance as well as compact form factor. Since all semiconductor failure and degradation is related to the temperature rise in semiconductor devices, accurate temperature monitoring is necessary and are considered necessary in future generations of wide bandgap power modules. In this paper, a comparative temperature sensitive electrical parameter study is conducted for Si, SiC and GaN power devices. The results can be used in choosing the most sensitive electrical parameter for online junction temperature sensing.

Measuring the junction temperature of an IGBT using its threshold voltage as a temperature sensitive electrical parameter (TSEP)

Abstract: To ensure the thermally safe operation of a power electronic module it is appropriate to monitor the junction temperatures Tj of its semiconductor devices. In addition, a condition monitoring of the power electronic module can be implemented by comparing the measured temperature data with model based calculated values. Using long-term monitoring of Tj, it is possible to determine thermal weaknesses along the heat path between chip and heat sink as well as wearout of the electrical construction. However, since it is not possible to determine the junction temperature directly in standard applications, an indirect method for determining Tj can be applied. In this paper, the concept for measuring the junction temperature of an IGBT by using its threshold voltage Vth, also known as VoE(th), is described.

Aging characteristics of blue InGaN micro-light emitting diodes at an extremely high current density of 3.5kAcm−2

Abstract: The aging characteristics of blue InGaN micro-light emitting diodes (micro-LEDs) with different sizes have been studied at an extremely high current density 3.5 kA cm−2 for emerging micro-LED applications including visible light communication (VLC), micro-LED pumped organic lasers and optogenetics. The light output power of micro-LEDs first increases and then decreases due to the competition of Mg activation in p-GaN layer and defect generation in the active region. The smaller micro-LEDs show less light output power degradation compared with larger micro-LEDs, which is attributed to the lower junction temperature of smaller micro-LEDs. It is found that the high current density without additional junction temperature cannot induce significant micro-LED degradation at room temperature but the combination of the high current density and high junction temperature leads to strong degradation. Furthermore, the cluster LEDs, composed of a micro-LED array, have been developed with both high light output power and less light output degradation for micro-LED applications in solid state lighting and VLC.

Temperature-dependent turn-on loss analysis for GaN HFETs

Abstract: Enhancement-mode GaN HFETs enable efficient high-frequency converter design, but this technology is relatively new and exhibits different characteristics from Si or SiC MOSFETs. GaN performance at elevated temperature is especially unique. Turn-on time increases significantly with temperature, and turn-on losses increase as a result. This phenomenon can be explained based on the relationships between junction temperature and GaN device transconductance, and between transconductance and turn-on time. An analytical relationship between temperature and turn-on loss has been derived for the 650-V GS66508 from GaN Systems, and verified with experimental results. Based on this relationship, a detailed model is developed, and a simplified scaling factor is proposed for estimating turn-on loss in e-mode GaN HFETs, using room-temperature switching characterization and typically published datasheet parameters.

Computational light junction temperature estimator for active thermal control

Abstract: The junction temperature of power semiconductors in power converters must not exceed its maximum limits and it is of major importance for several failure mechanisms. But still, the junction temperature is hard to access. Direct measurement is not practical for industrial applications, indirect measurements require substantial effort and available junction temperature models have high calculation effort. This work develops a simple junction temperature estimator, which is applied for a maximum junction temperature limitation and the capability to be applied for further algorithm relying on the junction temperature, referring to active thermal control. It is experimentally shown, that a second order estimator is sufficient to achieve high bandwidth estimation.

Thermal Effects on LED Lamp With Different Thermal Interface Materials

Abstract: Thermal performances of light-emitting diode (LED) lamp with three types of thermal interface materials (TIMs) under different convection coefficients and input powers are investigated by using finite-element method. Three types of TIMs are conductive silver, Sn63Pb37 of tin alloy solder, and graphene in this paper. The results demonstrate that the temperature of the LED lamp decreases sharply using the interface material of graphene. With the increasing convection coefficient in a certain range, the junction temperature will be effectively decreased. When under high input powers, graphene has a much better performance than other two TIMs. It implies that graphene may be a possible potential for thermal design, which can effectively prolong the life of LED, especially for high power devices. The simulation offers a test of LED heat dissipation using different TIMs, and the results can provide a reference for the application of graphene in LED thermal design as TIMs and build a motivation for future material research directions. It builds a basis for progressive study of physical property for LED lamp. The obtained results may give insight to the reliability of the LED lamp.

Miniaturized Double Side Cooling Packaging for High Power 3 Phase SiC Inverter Module with Junction Temperature over 220°C

Abstract: In this paper, authors developed miniaturizeddouble side cooling packaging for SiC (silicon carbide) highpower inverter module using new material solutions towithstand high temperature condition over 220oC. Instead ofconventional thick wire bonding on the device, the flip chipbonding for high power source and gate interconnections aredeveloped. For the drain interconnection, copper clips areattached using high temperature endurable interconnectionmaterials. By utilizing these flip-chip structures, the powermodule with double side cooling design was enabled effectivelyfor the heat dissipation induced by high power switchingoperation. Through the thermal modeling and characterization, the power module's package thermal dissipation performancewas found to be enhanced by 2 times compared with theconventional single side cooling type power module. To copewith the increased maximum junction temperature limit tooperate wide band gap power devices the novel packagingmaterial and its process which can endure up to 220 oC weredeveloped also. Bi and Ag based high temperature solder wasapplied for the flip-chip bumping for SiC device on the DBC(direct bonded copper). The copper clip was applied on thedevice backside as drain interconnection to DBC also. Hightemperature endurable EMC (epoxy molding compound) andTIM (thermal interface material) were also evaluated. Thepackaging process was optimized and developed along with themodeling. Through the reliability assessment, we could showthe potential applicability of double side cooling power modulewith flip-chip and clip bonding design and it would be usefulfor the SiC and GaN based high power module and highjunction and environmental temperature endurableapplications for the near future.

Temperature sensitive electrical parameters for condition monitoring in SiC power MOSFETs

Abstract: This paper presents an analysis of the turn ON transient for SiC power MOSFETs and defines a Temperature Sensitive Electrical Parameter (TSEP) which is suitable for condition monitoring. The drain current switching rate dIDS/dt and its temperature dependency have been measured and analysed for commercially available 1.2 kV/10 A, 1.2 kV/24 A and 1.2 kV/42 A SiC MOSFETs from Wolfspeed showing that at lower switching speeds, i.e. using high gate resistances, it can be a suitable TSEP for condition monitoring. The impact of temperature on the switching speed indicates that the current switching rate is a more effective TSEP for higher current rated devices and the evaluation of the switching losses suggests that the sacrifice in switching speed for enabling the ability of estimating the junction temperature is not a major trade-off.