Showing papers on "Transistor published in 2019"

Modern microprocessor built from complementary carbon nanotube transistors

Abstract: Electronics is approaching a major paradigm shift because silicon transistor scaling no longer yields historical energy-efficiency benefits, spurring research towards beyond-silicon nanotechnologies. In particular, carbon nanotube field-effect transistor (CNFET)-based digital circuits promise substantial energy-efficiency benefits, but the inability to perfectly control intrinsic nanoscale defects and variability in carbon nanotubes has precluded the realization of very-large-scale integrated systems. Here we overcome these challenges to demonstrate a beyond-silicon microprocessor built entirely from CNFETs. This 16-bit microprocessor is based on the RISC-V instruction set, runs standard 32-bit instructions on 16-bit data and addresses, comprises more than 14,000 complementary metal–oxide–semiconductor CNFETs and is designed and fabricated using industry-standard design flows and processes. We propose a manufacturing methodology for carbon nanotubes, a set of combined processing and design techniques for overcoming nanoscale imperfections at macroscopic scales across full wafer substrates. This work experimentally validates a promising path towards practical beyond-silicon electronic systems. A 16-bit microprocessor built from over 14,000 carbon nanotube transistors may enable energy efficiency advances in electronics technologies beyond silicon.

A ferroelectric semiconductor field-effect transistor

Abstract: Ferroelectric field-effect transistors employ a ferroelectric material as a gate insulator, the polarization state of which can be detected using the channel conductance of the device. As a result, the devices are potentially of use in non-volatile memory technology, but they suffer from short retention times, which limits their wider application. Here, we report a ferroelectric semiconductor field-effect transistor in which a two-dimensional ferroelectric semiconductor, indium selenide (α-In2Se3), is used as the channel material in the device. α-In2Se3 was chosen due to its appropriate bandgap, room-temperature ferroelectricity, ability to maintain ferroelectricity down to a few atomic layers and its potential for large-area growth. A passivation method based on the atomic layer deposition of aluminium oxide (Al2O3) was developed to protect and enhance the performance of the transistors. With 15-nm-thick hafnium oxide (HfO2) as a scaled gate dielectric, the resulting devices offer high performance with a large memory window, a high on/off ratio of over 108, a maximum on current of 862 μA μm−1 and a low supply voltage. A ferroelectric semiconductor field-effect transistor, which uses the two-dimensional ferroelectric semiconductor α-In2Se3 as a channel material, could offer enhanced capabilities compared with conventional ferroelectric field-effect transistors in non-volatile memory applications.

Nanowire Electronics: From Nanoscale to Macroscale

Abstract: Semiconductor nanowires have attracted extensive interest as one of the best-defined classes of nanoscale building blocks for the bottom-up assembly of functional electronic and optoelectronic devices over the past two decades. The article provides a comprehensive review of the continuing efforts in exploring semiconductor nanowires for the assembly of functional nanoscale electronics and macroelectronics. Specifically, we start with a brief overview of the synthetic control of various semiconductor nanowires and nanowire heterostructures with precisely controlled physical dimension, chemical composition, heterostructure interface, and electronic properties to define the material foundation for nanowire electronics. We then summarize a series of assembly strategies developed for creating well-ordered nanowire arrays with controlled spatial position, orientation, and density, which are essential for constructing increasingly complex electronic devices and circuits from synthetic semiconductor nanowires. Next, we review the fundamental electronic properties and various single nanowire transistor concepts. Combining the designable electronic properties and controllable assembly approaches, we then discuss a series of nanoscale devices and integrated circuits assembled from nanowire building blocks, as well as a unique design of solution-processable nanowire thin-film transistors for high-performance large-area flexible electronics. Last, we conclude with a brief perspective on the standing challenges and future opportunities.

Internal ion-gated organic electrochemical transistor: A building block for integrated bioelectronics

Abstract: Real-time processing and manipulation of biological signals require bioelectronic devices with integrated components capable of signal amplification, processing, and stimulation. Transistors form the backbone of such circuits, but numerous criteria must be met for efficient and safe operation in biological environments. Here, we introduce an internal ion-gated organic electrochemical transistor (IGT) that uses contained mobile ions within the conducting polymer channel to permit both volumetric capacitance and shortened ionic transit time. The IGT has high transconductance, fast speed, and can be independently gated to create scalable conformable integrated circuits. We demonstrate the ability of the IGT to provide a miniaturized, comfortable interface with human skin using local amplification to record high-quality brain neurophysiological activity. The IGT is an effective transistor architecture for enabling integrated, real-time sensing and stimulation of signals from living organisms.

Spin tunnel field-effect transistors based on two-dimensional van der Waals heterostructures

Abstract: A transistor based on spin rather than charge—a spin transistor—could potentially offer non-volatile data storage and improved performance compared with traditional transistors. Many approaches have been explored to realize spin transistors, but their development remains a considerable challenge. The recent discovery of two-dimensional magnetic insulators such as chromium triiodide (CrI3), which offer electrically switchable magnetic order and an effective spin filtering effect, can provide new operating principles for spin transistors. Here, we report spin tunnel field-effect transistors (TFETs) based on dual-gated graphene/CrI3/graphene tunnel junctions. The devices exhibit an ambipolar behaviour and tunnel conductance that is dependent on the magnetic order in the CrI3 tunnel barrier. The gate voltage switches the tunnel barrier between interlayer antiferromagnetic and ferromagnetic states under a constant magnetic bias near the spin-flip transition, thus effectively and reversibly altering the device between a low and a high conductance state, with large hysteresis. By electrically controlling the magnetization configurations instead of the spin current, our spin TFETs achieve a high–low conductance ratio approaching 400%, suggesting they could be of value in the development of non-volatile memory applications. A tunnel field-effect transistor with spin-dependent outputs that are voltage controllable and reversible can be created using a dual-gated graphene/CrI3/graphene tunnel junction.

Three-dimensional monolithic integration in flexible printed organic transistors.

Abstract: Direct printing of thin-film transistors has enormous potential for ubiquitous and lightweight wearable electronic applications. However, advances in printed integrated circuits remain very rare. Here we present a three-dimensional (3D) integration approach to achieve technology scaling in printed transistor density, analogous to Moore’s law driven by lithography, as well as enhancing device performance. To provide a proof of principle for the approach, we demonstrate the scalable 3D integration of dual-gate organic transistors on plastic foil by printing with high yield, uniformity, and year-long stability. In addition, the 3D stacking of three complementary transistors enables us to propose a programmable 3D logic array as a new route to design printed flexible digital circuitry essential for the emerging applications. The 3D monolithic integration strategy demonstrated here is applicable to other emerging printable materials, such as carbon nanotubes, oxide semiconductors and 2D semiconducting materials. The scalability of printable integrated circuits is lagging far behind that of conventional silicon-based technologies. Here, Kwon et al. show a three-dimensional integration approach by stacking printeddual-gate organic transistors on plastic foils with a density of 60 transistors per centimeter square.

A room-temperature organic polariton transistor

Abstract: Active optical elements with ever smaller footprint and lower energy consumption are central to modern photonics. The drive for miniaturization, speed and efficiency, with the concomitant volume reduction of the optically active area, has led to the development of devices that harness strong light–matter interactions. By managing the strength of light–matter coupling to exceed losses, quasiparticles, called exciton-polaritons, are formed that combine the properties of the optical fields with the electronic excitations of the active material. By making use of polaritons in inorganic semiconductor microcavities, all-optical transistor functionality was observed, albeit at cryogenic temperatures1. Here, we replace inorganic semiconductors with a ladder-type polymer in an optical microcavity and realize room-temperature operation of a polariton transistor through vibron-mediated stimulated polariton relaxation. We demonstrate net gain of ~10 dB μm−1, sub-picosecond switching time, cascaded amplification and all-optical logic operation at ambient conditions. Net gain of ~10 dB µm–1 and sub-picosecond switching time are shown at room temperature for optical transistors using polymers in a microcavity.

Printed subthreshold organic transistors operating at high gain and ultralow power.

Abstract: Overcoming the trade-offs among power consumption, fabrication cost, and signal amplification has been a long-standing issue for wearable electronics. We report a high-gain, fully inkjet-printed Schottky barrier organic thin-film transistor amplifier circuit. The transistor signal amplification efficiency is 38.2 siemens per ampere, which is near the theoretical thermionic limit, with an ultralow power consumption of 60 decibels and noise voltage of <0.3 microvolt per hertz1/2 at 100 hertz.

Inkjet-printed stretchable and low voltage synaptic transistor array

Abstract: Wearable and skin electronics benefit from mechanically soft and stretchable materials to conform to curved and dynamic surfaces, thereby enabling seamless integration with the human body. However, ...

Light-Stimulated Synaptic Transistors Fabricated by a Facile Solution Process Based on Inorganic Perovskite Quantum Dots and Organic Semiconductors.

Abstract: Implementation of artificial intelligent systems with light-stimulated synaptic emulators may enhance computational speed by providing devices with high bandwidth, low power computation requirements, and low crosstalk. One of the key challenges is to develop light-stimulated devices that can response to light signals in a neuron-/synapse-like fashion. A simple and effective solution process to fabricate light-stimulated synaptic transistors (LSSTs) based on inorganic halide perovskite quantum dots (IHP QDs) and organic semiconductors (OSCs) is reported. Blending IHP QDs and OSCs not only improves the charge separation efficiency of the photoexcited charges, but also induces delayed decay of the photocurrent in the IHP QDs/OSCs hybrid film. The enhanced charge separation efficiency results in high photoresponsivity, while the induced delayed decay of the photocurrent is critical to achieving light-stimulating devices with a memory effect, which are important for achieving high synaptic performance. The LSSTs can respond to light signals in a highly neuron-/synapse-like fashion. Both short-term and long-term synaptic behaviors have been realized, which may lay the foundation for the future implementation of artificial intelligent systems that are enabled by light signals. More significantly, LSSTs are fabricated by a facile solution process which can be easily applied to large-scale samples.

Two-Terminal Multibit Optical Memory via van der Waals Heterostructure.

Abstract: 2D van der Waals (vdWs) heterostructures exhibit intriguing optoelectronic properties in photodetectors, solar cells, and light-emitting diodes. In addition, these materials have the potential to be further extended to optical memories with promising broadband applications for image sensing, logic gates, and synaptic devices for neuromorphic computing. In particular, high programming voltage, high off-power consumption, and circuital complexity in integration are primary concerns in the development of three-terminal optical memory devices. This study describes a multilevel nonvolatile optical memory device with a two-terminal floating-gate field-effect transistor with a MoS2 /hexagonal boron nitride/graphene heterostructure. The device exhibits an extremely low off-current of ≈10-14 A and high optical switching on/off current ratio of over ≈106 , allowing 18 distinct current levels corresponding to more than four-bit information storage. Furthermore, it demonstrates an extended endurance of over ≈104 program-erase cycles and a long retention time exceeding 3.6 × 104 s with a low programming voltage of -10 V. This device paves the way for miniaturization and high-density integration of future optical memories with vdWs heterostructures.

Small footprint transistor architecture for photoswitching logic and in situ memory.

Abstract: The need for continuous size downscaling of silicon transistors is driving the industrial development of strategies to enable further footprint reduction1,2. The atomic thickness of two-dimensional materials allows the potential realization of high-area-efficiency transistor architectures. However, until now, the design of devices composed of two-dimensional materials has mimicked the basic architecture of silicon circuits3-6. Here, we report a transistor based on a two-dimensional material that can realize photoswitching logic (OR, AND) computing in a single cell. Unlike the conventional transistor working mechanism, the two-dimensional material logic transistor has two surface channels. Furthermore, the material thickness can change the logic behaviour-the architecture can be flexibly expanded to achieve in situ memory such as logic computing and data storage convergence in the same device. These devices are potentially promising candidates for the construction of new chips that can perform computing and storage with high area-efficiency and unique functions.

All-printed large-scale integrated circuits based on organic electrochemical transistors.

Abstract: The communication outposts of the emerging Internet of Things are embodied by ordinary items, which desirably include all-printed flexible sensors, actuators, displays and akin organic electronic interface devices in combination with silicon-based digital signal processing and communication technologies. However, hybrid integration of smart electronic labels is partly hampered due to a lack of technology that (de)multiplex signals between silicon chips and printed electronic devices. Here, we report all-printed 4-to-7 decoders and seven-bit shift registers, including over 100 organic electrochemical transistors each, thus minimizing the number of terminals required to drive monolithically integrated all-printed electrochromic displays. These relatively advanced circuits are enabled by a reduction of the transistor footprint, an effort which includes several further developments of materials and screen printing processes. Our findings demonstrate that digital circuits based on organic electrochemical transistors (OECTs) provide a unique bridge between all-printed organic electronics (OEs) and low-cost silicon chip technology for Internet of Things applications. Though designing digital circuits using organic electrochemical transistors (OECTs) is promising due to their high performance, inherent large footprint limits adoption. Here, the authors report staggered top-gate OECTs for all-printed integrated circuits with fast switching and small footprint.

Low-voltage high-performance flexible digital and analog circuits based on ultrahigh-purity semiconducting carbon nanotubes.

Abstract: Carbon nanotube (CNT) thin-film transistor (TFT) is a promising candidate for flexible and wearable electronics. However, it usually suffers from low semiconducting tube purity, low device yield, and the mismatch between p- and n-type TFTs. Here, we report low-voltage and high-performance digital and analog CNT TFT circuits based on high-yield (19.9%) and ultrahigh purity (99.997%) polymer-sorted semiconducting CNTs. Using high-uniformity deposition and pseudo-CMOS design, we demonstrated CNT TFTs with good uniformity and high performance at low operation voltage of 3 V. We tested forty-four 2-µm channel 5-stage ring oscillators on the same flexible substrate (1,056 TFTs). All worked as expected with gate delays of 42.7 ± 13.1 ns. With these high-performance TFTs, we demonstrated 8-stage shift registers running at 50 kHz and the first tunable-gain amplifier with 1,000 gain at 20 kHz. These results show great potentials of using solution-processed CNT TFTs for large-scale flexible electronics. Carbon nanotube thin-film transistor is promising for solution-processed, large-scale flexible electronics, but the device yields remain poor to date. Lei et al. show low-voltage flexible digital and analog circuits based on high-purity and high-yield separation of semiconducting carbon nanotubes.

Reconfigurable two-dimensional optoelectronic devices enabled by local ferroelectric polarization.

Abstract: Ferroelectric engineered pn doping in two-dimensional (2D) semiconductors hold essential promise in realizing customized functional devices in a reconfigurable manner. Here, we report the successful pn doping in molybdenum disulfide (MoS2) optoelectronic device by local patterned ferroelectric polarization, and its configuration into lateral diode and npn bipolar phototransistors for photodetection from such a versatile playground. The lateral pn diode formed in this way manifests efficient self-powered detection by separating ~12% photo-generated electrons and holes. When polarized as bipolar phototransistor, the device is customized with a gain ~1000 by its transistor action, reaching the responsivity ~12 A W−1 and detectivity over 1013 Jones while keeping a fast response speed within 20 μs. A promising pathway toward high performance optoelectronics is thus opened up based on local ferroelectric polarization coupled 2D semiconductors. Photodetectors based on two dimensional (2D) materials still suffer from low performance. Here, the authors tackle this issue by introducing a reconfigurable design enabled by locally tuning the doping of a 2D molybdenum disulfide film through the polarization of an underlying ferroelectric material.

Ultrathin calcium fluoride insulators for two-dimensional field-effect transistors

Abstract: Two-dimensional semiconductors could be used to fabricate ultimately scaled field-effect transistors and more-than-Moore nanoelectronic devices. However, these targets cannot be reached without appropriate gate insulators that are scalable to the nanometre range. Typically used oxides such as SiO2, Al2O3 and HfO2 are, however, amorphous when scaled, and 2D hexagonal boron nitride exhibits excessive gate leakage currents. Here, we show that epitaxial calcium fluoride (CaF2), which can form a quasi van der Waals interface with 2D semiconductors, can serve as an ultrathin gate insulator for 2D devices. We fabricate scalable bilayer MoS2 field-effect transistors with a crystalline CaF2 insulator of ~2 nm thickness, which corresponds to an equivalent oxide thickness of less than 1 nm. Our devices exhibit low leakage currents and competitive device performance characteristics, including subthreshold swings down to 90 mV dec−1, on/off current ratios up to 107 and a small hysteresis. High-performance MoS2 transistors can be created using 2-nm-thick CaF2 as a gate insulator, which forms a quasi van der Waals interface with the 2D semiconductor.

An Overview of Normally-Off GaN-Based High Electron Mobility Transistors.

Abstract: Today, the introduction of wide band gap (WBG) semiconductors in power electronics has become mandatory to improve the energy efficiency of devices and modules and to reduce the overall electric power consumption in the world. Due to its excellent properties, gallium nitride (GaN) and related alloys (e.g., AlxGa1−xN) are promising semiconductors for the next generation of high-power and high-frequency devices. However, there are still several technological concerns hindering the complete exploitation of these materials. As an example, high electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructures are inherently normally-on devices. However, normally-off operation is often desired in many power electronics applications. This review paper will give a brief overview on some scientific and technological aspects related to the current normally-off GaN HEMTs technology. A special focus will be put on the p-GaN gate and on the recessed gate hybrid metal insulator semiconductor high electron mobility transistor (MISHEMT), discussing the role of the metal on the p-GaN gate and of the insulator in the recessed MISHEMT region. Finally, the advantages and disadvantages in the processing and performances of the most common technological solutions for normally-off GaN transistors will be summarized.

Field-Effect Transistor Biosensors for Biomedical Applications: Recent Advances and Future Prospects.

Abstract: During recent years, field-effect transistor biosensors (Bio-FET) for biomedical applications have experienced a robust development with evolutions in FET characteristics as well as modification of bio-receptor structures. This review initially provides contemplation on this progress by briefly summarizing remarkable studies on two aforementioned aspects. The former includes fabricating unprecedented nanostructures and employing novel materials for FET transducers whereas the latter primarily synthesizes compact molecules as bio-probes (antibody fragments and aptamers). Afterwards, a future perspective on research of FET-biosensors is also predicted depending on current situations as well as its great demand in clinical trials of disease diagnosis. From these points of view, FET-biosensors with infinite advantages are expected to continuously advance as one of the most promising tools for biomedical applications.

An Evolvable Organic Electrochemical Transistor for Neuromorphic Applications.

Abstract: An evolvable organic electrochemical transistor (OECT), operating in the hybrid accumulation-depletion mode is reported, which exhibits short-term and long-term memory functionalities. The transistor channel, formed by an electropolymerized conducting polymer, can be formed, modulated, and obliterated in situ and under operation. Enduring changes in channel conductance, analogous to long-term potentiation and depression, are attained by electropolymerization and electrochemical overoxidation of the channel material, respectively. Transient changes in channel conductance, analogous to short-term potentiation and depression, are accomplished by inducing nonequilibrium doping states within the transistor channel. By manipulating the input signal, the strength of the transistor response to a given stimulus can be modulated within a range that spans several orders of magnitude, producing behavior that is directly comparable to short- and long-term neuroplasticity. The evolvable transistor is further incorporated into a simple circuit that mimics classical conditioning. It is forecasted that OECTs that can be physically and electronically modulated under operation will bring about a new paradigm of machine learning based on evolvable organic electronics.

A critical review of recent progress on negative capacitance field-effect transistors

Abstract: The elegant simplicity of the device concept and the urgent need for a new "transistor" at the twilight of Moore's law have inspired many researchers in industry and academia to explore the physics and technology of negative capacitance field effect transistor (NC-FET). Although hundreds of papers have been published, the validity of quasi-static NC and the frequency-reliability limits of NC-FET are still being debated. The concept of NC - if conclusively demonstrated - will have broad impacts on device physics and technology development. Here, the authors provide a critical review of recent progress on NC-FETs research and some starting points for a coherent discussion.

A Critical Review of Recent Progress on Negative Capacitance Field-Effect Transistors.

Abstract: The elegant simplicity of the device concept and the urgent need for a new "transistor" at the twilight of Moore's law have inspired many researchers in industry and academia to explore the physics and technology of negative capacitance field effect transistor (NC-FET). Although hundreds of papers have been published, the validity of quasi-static NC and the frequency-reliability limits of NC-FET are still being debated. The concept of NC - if conclusively demonstrated - will have broad impacts on device physics and technology development. Here, the authors provide a critical review of recent progress on NC-FETs research and some starting points for a coherent discussion.

Strain-Based Room-Temperature Non-Volatile MoTe$_2$ Ferroelectric Phase Change Transistor

Abstract: The primary mechanism of operation of almost all transistors today relies on electric-field effect in a semiconducting channel to tune its conductivity from the conducting 'on'-state to a non-conducting 'off'-state. As transistors continue to scale down to increase computational performance, physical limitations from nanoscale field-effect operation begin to cause undesirable current leakage that is detrimental to the continued advancement of computing. Using a fundamentally different mechanism of operation, we show that through nanoscale strain engineering with thin films and ferroelectrics (FEs) the transition metal dichalcogenide (TMDC) MoTe$_2$ can be reversibly switched with electric-field induced strain between the 1T'-MoTe$_2$ (semimetallic) phase to a semiconducting MoTe$_2$ phase in a field effect transistor geometry. This alternative mechanism for transistor switching sidesteps all the static and dynamic power consumption problems in conventional field-effect transistors (FETs). Using strain, we achieve large non-volatile changes in channel conductivity (G$_{on}$/G$_{off}$~10$^7$ vs. G$_{on}$/G$_{off}$~0.04 in the control device) at room temperature. Ferroelectric devices offer the potential to reach sub-ns nonvolatile strain switching at the attojoule/bit level, having immediate applications in ultra-fast low-power non-volatile logic and memory while also transforming the landscape of computational architectures since conventional power, speed, and volatility considerations for microelectronics may no longer exist.

A WSe2 vertical field emission transistor.

Abstract: We report the first observation of a gate-controlled field emission current from a tungsten diselenide (WSe2) monolayer, synthesized by chemical-vapour deposition on a SiO2/Si substrate. Ni contacted WSe2 monolayer back-gated transistors, under high vacuum, exhibit n-type conduction and drain-bias dependent transfer characteristics, which are attributed to oxygen/water desorption and drain induced Schottky barrier lowering, respectively. The gate-tuned n-type conduction enables field emission, i.e. the extraction of electrons by quantum tunnelling, even from the flat part of the WSe2 monolayers. Electron emission occurs under an electric field ∼100 V μm-1 and exhibits good time stability. Remarkably, the field emission current can be modulated by the back-gate voltage. The first field-emission vertical transistor based on the WSe2 monolayer is thus demonstrated and can pave the way to further optimize new WSe2 based devices for use in vacuum electronics.

A Megawatt-Scale Medium-Voltage High-Efficiency High Power Density “SiC+Si” Hybrid Three-Level ANPC Inverter for Aircraft Hybrid-Electric Propulsion Systems

Abstract: A hybrid-electric propulsion system is an enabling technology to make the aircraft more fuel saving, quieter, and lower carbide emission. In this article, a megawatt (MW) scale power inverter based on a three-level active neutral-point-clamped (3L-ANPC) topology will be developed. To achieve high efficiency, the switching devices operating at carrier frequency in the power converter are configured by the emerging silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors, while the conventional silicon (Si) insulated-gate bipolar transistors are selected for switches operating at the fundamental output frequency. To obtain high power density, dc bus voltage is increased from the conventional 270 V to medium voltage of 2.4 kV to reduce cable weight. Also, unlike the traditional 400 Hz dominated aircraft ac systems, the rated fundamental output frequency here is boosted to 1.4 kHz to drive the high-speed motor, which helps further to reduce the motor weight. Main hardware development and control modulation strategies are presented. Experimental results are presented to verify the performance of this MW-scale medium-voltage “SiC+Si” hybrid 3L-ANPC inverter. It is shown that the 1-MW 3L-ANPC inverter can achieve a high efficiency of 99% and a high power density of 12 kVA/kg.

Vertical, electrolyte-gated organic transistors: continuous operation in the MA/cm$^2$ regime and use as low-power artificial synapses

Abstract: Organic semiconductors are usually not thought to show outstanding performance in highly-integrated, sub 100 nm transistors. Consequently, single-crystalline materials such as SWCNTs, MoS2 or inorganic semiconductors are the material of choice at these nanoscopic dimensions. Here, we show that using a novel vertical field-effect transistor design with a channel length of only 40 nm and a footprint of 2 x 80 x 80 nm$^2$, high electrical performance with organic polymers can be realized when using electrolyte gating. Our organic transistors combine high on-state current densities of above 3 MA/cm$^2$, on/off current modulation ratios of up to 108 and large transconductances of up to 5000 S/m. Given the high on-state currents at yet large on/off ratios, our novel structures also show promise for use in artificial neural networks, where they could operate as memristive devices with sub 100 fJ energy usage.

Electrolyte‐Gated Synaptic Transistor with Oxygen Ions

Abstract: Artificial synaptic devices are the essential hardware of neuromorphic computing systems, which can simultaneously perform signal processing and information storage between two neighboring artificial neurons. Emerging electrolyte-gated transistors have attracted much attention for efficient synaptic emulation by using an addition gate terminal. Here, an electrolyte-gated synaptic device based on the SrCoOx (SCO) films is proposed. It is demonstrated that the reversible modulation of SCO phase transforms the brownmillerite SrCoO2.5 and perovskite SrCoO3−δ, through controlling the insertion and extraction of oxygen ions with electrolyte gating. Nonvolatile multilevel conduction states can be realized in the SCO films following this route. The synaptic functions such as the long-term potentiation and depression of synaptic weight, spike-timing-dependent plasticity, as well as spiking logic operations in the device are successfully mimicked. These results provide an alternative avenue for future neuromorphic devices via electrolyte-gated transistors with oxygen ions.

Ionic-to-electronic current amplification in hybrid perovskite solar cells: ionically gated transistor-interface circuit model explains hysteresis and impedance of mixed conducting devices

Abstract: Mobile ions in hybrid perovskite semiconductors introduce a new degree of freedom to electronic devices suggesting applications beyond photovoltaics. An intuitive device model describing the interplay between ionic and electronic charge transfer is needed to unlock the full potential of the technology. We describe the perovskite-contact interfaces as transistors which couple ionic charge redistribution to energetic barriers controlling electronic injection and recombination. This reveals an amplification factor between the out of phase electronic current and the ionic current. Our findings suggest a strategy to design thin film electronic components with large, tuneable, capacitor-like and inductor-like characteristics. The resulting simple equivalent circuit model, which we verified with time-dependent drift-diffusion simulations of measured impedance spectra, allows a general description and interpretation of perovskite solar cell behaviour.

A High-Sensitivity AlGaN/GaN HEMT Terahertz Detector With Integrated Broadband Bow-Tie Antenna

Abstract: Many emerging applications in the terahertz (THz) frequency range demand highly sensitive, broadband detectors for room-temperature operation. Field-effect transistors with integrated antennas for THz detection (TeraFETs) have proven to meet these requirements, at the same time offering great potential for scalability, high-speed operation, and functional integrability. In this contribution, we report on an optimized field-effect transistor with integrated broadband bow-tie antenna for THz detection (bow-tie TeraFET) and compare the detector's performance to other state-of-the-art broadband THz detector technologies. Implemented in a recently developed AlGaN/GaN MMIC process, the presented TeraFET shows a more than twice performance improvement compared to previously fabricated AlGaN/GaN-HEMT-based TeraFETs. The detector design is the result of detailed modeling of the plasma-wave-based detection principle embedded in a full-device detector model to account for power coupling of the THz radiation to the intrinsic gated FET channel. The model considers parasitic circuit elements as well as the high-frequency impedance of the integrated broadband antenna, and also includes optical losses from a silicon substrate lens. Calibrated characterization measurements have been performed at room temperature between 490 and 645 GHz, where we find values of the optical (total beam power referenced) noise-equivalent power of 25 and ${\text{31 pW}}/\surd{\text{Hz}}$ at 504 and 600 GHz, respectively, in good agreement with simulation results. We then show the broadband detection capability of our AlGaN/GaN detectors in the range from 0.2 to 1.2 THz and compare the TeraFETs’ signal-to-noise ratio to that of a Golay cell and a photomixer. Finally, we demonstrate an imaging application in reflection geometry at 504 GHz and determine a dynamic range of >40 dB.