Proceedings ArticleDOI
Delaying forever: Uniaxial strained silicon transistors in a 90nm CMOS technology
Kaizad Mistry,Mark Armstrong,C. Auth,S. Cea,T. Coan,Tahir Ghani,T. Hoffmann,Anand Portland Murthy,J. Sandford,R. Shaheed,K. Zawadzki,Kevin Zhang,Scott E. Thompson,Mark T. Bohr +13 more
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TLDR
In this article, the authors describe the device physics of uniaxial strained silicon transistors, and show that PMOS drive current is 0.72mA/ /spl mu/m.Abstract:
We describe the device physics of uniaxial strained silicon transistors. Uniaxial strain is more effective, less costly and easier to implement. The highest PMOS drive current to date is reported: 0.72mA/ /spl mu/m. Pattern sensitivity and mobility/Rext partitioning are discussed. Finally we measure inverter delays as low as 4.6pS, and show 50Mb SRAMs operational at 0.65V.read more
Citations
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Patent
Semiconductor device, and manufacturing method thereof
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Proceedings ArticleDOI
A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging
Kaizad Mistry,C. Allen,C. Auth,B. Beattie,Daniel B. Bergstrom,M. Bost,M. Brazier,M. Buehler,Annalisa Cappellani,R. Chau,C. H. Choi,G. Ding,K. Fischer,Tahir Ghani,R. Grover,W. Han,D. Hanken,M. Hattendorf,J. He,J. Hicks,R. Huessner,D. Ingerly,Pulkit Jain,R. James,L. Jong,Subhash M. Joshi,C. Kenyon,K. Kuhn,K. Lee,Huichu Liu,J. Maiz,B. Mclntyre,P. Moon,J. Neirynck,S. Pae,C. Parker,D. Parsons,Chetan Prasad,L. Pipes,M. Prince,Pushkar Ranade,T. Reynolds,J. Sandford,Lucian Shifren,J. Sebastian,J. Seiple,D. Simon,Swaminathan Sivakumar,Pete Smith,C. Thomas,T. Troeger,P. Vandervoorn,S. Williams,K. Zawadzki +53 more
TL;DR: In this paper, a 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process, resulting in the highest drive currents yet reported for NMOS and PMOS.
Journal ArticleDOI
A 30 Year Retrospective on Dennard's MOSFET Scaling Paper
TL;DR: The MOSFET scaling principles for obtaining simultaneous improvements in transistor density, switching speed, and power dissipation described by Robert H. Dennard and others in "Design of Ion-implanted MOSFCs with Very Small Physical Dimensions" (1974 ) became a roadmap for the semiconductor industry to provide systematic and predictable transistor improvements as mentioned in this paper.
Journal ArticleDOI
A micromachining-based technology for enhancing germanium light emission via tensile strain
Jinendra Raja Jain,Aaron C. Hryciw,Thomas M. Baer,David A. B. Miller,Mark L. Brongersma,Roger T. Howe +5 more
TL;DR: In this paper, a micromachining-based technology was employed to achieve significant enhancements in light emission from highly strained germanium-on-insulator samples, which was used to achieve a significant improvement in the light emission.
Journal ArticleDOI
Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing
TL;DR: A detailed case study on recessed silicon germanium transistors illustrates the application of the fundamentals to optimal transistor design as mentioned in this paper, and a review of current manufacturable strained-silicon technologies are reviewed with particular emphasis on scalability.
References
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Journal ArticleDOI
Piezoresistance Effect in Germanium and Silicon
TL;DR: In this article, the complete tensor piezoresistance has been determined experimentally for these materials and expressed in terms of the pressure coefficient of resistivity and two simple shear coefficients.
Journal ArticleDOI
Six-band k⋅p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness
TL;DR: In this paper, a six-band k⋅p model has been used to study the mobility of holes in Si inversion layers for different crystal orientations, for both compressive or tensile strain applied to the channel, and for a varying thickness of the Si layer.
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