Journal ArticleDOI
Improved Modeling of Bulk Charge Effect for BSIM-BULK Model
TLDR
An improved model of bulk charge effect for both drain current and capacitances and its implementation in the industry standard Berkeley short-channel IGFET model (BSIM)-BULK model is presented.Abstract:
In this brief, we present an improved model of bulk charge effect for both drain current ( ${I}_{\text {DS}}$ ) and capacitances and its implementation in the industry standard Berkeley short-channel IGFET model (BSIM)-BULK model. The proposed model captures all the well-known and important bulk charge effects, as the Abulk term does for BSIM3/BSIM4. The model is validated with the experimental and technology computer-aided design (TCAD) data. The proposed model enhances the fitting accuracy for ${I}_{\text {DS}}$ , and more importantly its derivatives and capacitances too.read more
Citations
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Book ChapterDOI
Semiconductor Device Modeling and Simulation for Electronic Circuit Design
TL;DR: In this paper, a discussion on physics-based analytical modeling approach to predict device operation at specific conditions such as applied bias (e.g., voltages and currents); environment (i.e., temperature, noise); and physical characteristics (e., geometry, doping levels).
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Modified small-signal behavioral model for GaN HEMTs based on support vector regression
MingQiang Geng,Jialin Cai,Justin B. King,Bin You,Jiangtao Su,Jun Liu,Lingling Sun,Wenhui Cao,Mian Pan +8 more
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Parameter Extraction for the PSPHV LDMOS Transistor Model
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Modeling of Drain Current for Grooved-Gate MOSFET
Jatmiko Endro Suseno,Jatmiko Endro Suseno,Sohail Anwar,Munawar Agus Riyadi,Munawar Agus Riyadi,Razali Ismail +5 more
TL;DR: In this paper, a drain current model of grooved-gate MOSFET which is based on the difference of the channel depth distance along the channel from the source to the drain in cylindrical coordinate is presented.
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Application of improved ACM model to the design by hand of CMOS analog circuits
TL;DR: In this paper , by-hand design methodologies for a few analog cells are proposed employing a MOSFET compact model which has been earlier improved by adding sub-models for some second order effects.
References
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Journal ArticleDOI
A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation
Yuhua Cheng,Min-Chie Jeng,Zhihong Liu,Jianhui Huang,Mansun Chan,Kai Chen,Ping Keung Ko,Chenming Hu +7 more
TL;DR: A new physical and continuous BSIM (Berkeley Short-Channel IGFET Model) I-V model in BSIM3v3 is presented for circuit simulation, which allows users to accurately describe the MOSFET characteristics over a wide range of channel lengths and widths for various technologies, and is attractive for statistical modeling.
Journal ArticleDOI
BSIM6: Analog and RF Compact Model for Bulk MOSFET
Yogesh Singh Chauhan,Sriramkumar Venugopalan,Maria-Anna Chalkiadaki,M. A. Karim,Harshit Agarwal,Sourabh Khandelwal,Navid Paydavosi,Juan Pablo Duarte,Christian Enz,Ali M. Niknejad,Chenming Hu +10 more
TL;DR: The BSIM6 model has been extensively validated with industry data from 40-nm technology node and shows excellent source-drain symmetry during both dc and small signal analysis, thus giving excellent results during analog and RF circuit simulations.
Journal ArticleDOI
Validation of MOSFET model Source–Drain Symmetry
TL;DR: In this paper, the authors present dc and ac tests that verify whether a MOSFET model is symmetric with respect to a source-drain reversal, and also verify the symmetry of gate and bulk currents.
Journal ArticleDOI
RF Small-Signal and Noise Modeling Including Parameter Extraction of Nanoscale MOSFET From Weak to Strong Inversion
TL;DR: In this article, a simple RF equivalent circuit is proposed, leading to first-order analytical expressions, which are able to describe the RF small-signal behavior of nanoscale MOSFET, including noise, across all inversion levels.
Proceedings ArticleDOI
A non-iterative physical procedure for RF CMOS compact model extraction using BSIM6
Sriramkumar Venugopalan,Krishnanshu Dandu,Samuel Martin,Richard J. K. Taylor,Claude R. Cirba,Xin Zhang,Ali M. Niknejad,Chenming Hu +7 more
TL;DR: This procedure is applicable to any MOSFET compact model with all necessary RF-related components in it and has been validated on silicon data from multiple technology nodes for a wide range of bias and frequency.