scispace - formally typeset
Journal ArticleDOI

Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS

Reads0
Chats0
TLDR
It is demonstrated that competitive RF performance is achievable thanks to CMOS downscaling, pleasing many applications because of their low cost (digital CMOS) and low area (bondpad size).
Abstract
The emerging concept of multistandard radios calls for low-noise amplifier (LNA) solutions able to comply with their needs. Meanwhile, the increasing cost of scaled CMOS pushes towards low-area solutions in standard, digital CMOS. Feedback LNAs are able to meet both demands. This paper is devoted to the design of low-area active-feedback LNAs. We discuss the design of wideband, narrowband and multiband implementations. We demonstrate that competitive RF performance is achievable thanks to CMOS downscaling, pleasing many applications because of their low cost (digital CMOS) and low area (bondpad size).

read more

Citations
More filters
Journal ArticleDOI

A 40 nm CMOS 0.4–6 GHz Receiver Resilient to Out-of-Band Blockers

TL;DR: A highly-linear software-defined radio operating from 400 MHz to 6 GHz is presented, with the purpose of removing any dedicated filtering at the antenna thanks to a 2.5 V linear LNA and mixer-based RF blocker filter.
Journal ArticleDOI

A 2-mm $^{2}$ 0.1–5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS

TL;DR: This paper demonstrates a practical 0.1-5 GHz front-end implementation for such an SDR concept, including receiver and local oscillator (LO), with only 2-mm2 core area occupation in a 45-nm CMOS process, enabling, for the first time, wideband reconfigurable performance and energy scalability.
Journal ArticleDOI

On the Design of Wideband Transformer-Based Fourth Order Matching Networks for ${E}$ -Band Receivers in 28-nm CMOS

TL;DR: This paper discusses the design of on-chip transformer-based fourth order filters, suitable for mm-Wave highly sensitive broadband low-noise amplifiers and receivers implemented in deep-scaled CMOS, and achieves a figure of merit better than state-of-the-art designs in the same band and comparable to LNAs at lower frequencies.
Journal ArticleDOI

A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique

TL;DR: The ULV circuit design challenges are discussed and a new biasing metric for ULV and ULP designs in deep-submicrometer CMOS technologies is introduced and series inductive peaking in the feedback loop is analyzed and employed to enhance the bandwidth and noise performance of the LNA.
Journal ArticleDOI

A Wideband Noise-Canceling CMOS LNA With Enhanced Linearity by Using Complementary nMOS and pMOS Configurations

TL;DR: A complementary noise-canceling CMOS low-noise amplifier (LNA) with enhanced linearity is proposed, while an active shunt feedback input stage offers input matching, while extended input matching bandwidth is acquired by a
References
More filters
Book

Operation and modeling of the MOS transistor

TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Journal ArticleDOI

A 1.5-V, 1.5-GHz CMOS low noise amplifier

TL;DR: In this article, a 1.5 GHz low noise amplifier (LNA) intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6/spl mu/m CMOS process.
Journal ArticleDOI

Wide-band CMOS low-noise amplifier exploiting thermal noise canceling

TL;DR: In this article, a feed-forward noise-canceling technique is proposed to cancel the noise and distortion contributions of the matching device, which allows for designing wide-band impedance-matching amplifiers with noise figure (NF) well below 3 dB.
Book

Distortion analysis of analog integrated circuits

Piet Wambacq, +1 more
TL;DR: General techniques to suppress nonlinear behavior such as pre-distortion, linear and nonlinear feedback are explained in detail and illustrated with realistic examples to fill the gap between the theory of nonlinear systems and practical analog integrated circuits.
Journal ArticleDOI

All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS

TL;DR: In this paper, the authors present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process, which is compatible with digital deep-submicron CMOS processes and can be readily integrated with a digital baseband and application processor.
Related Papers (5)