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Journal ArticleDOI

Metal-oxide-semiconductor capacitors on GaAs with high-k gate oxide and amorphous silicon interface passivation layer

TLDR
In this article, the electrical properties of metal-oxide-semiconductor capacitors on molecular beam epitaxial GaAs in situ passivated with ultrathin amorphous Si (a-Si) layer and with ex situ deposited HfO2 gate oxide and TaN metal gate were demonstrated.
Abstract
We demonstrate the electrical properties of metal-oxide-semiconductor capacitors on molecular beam epitaxial GaAs in situ passivated with ultrathin amorphous Si (a-Si) layer and with ex situ deposited HfO2 gate oxide and TaN metal gate. Minimum thickness of the Si interface passivation layer of 1.5 nm is needed to prevent the Fermi level pinning and provide good capacitance-voltage characteristics with equivalent oxide thickness of 2.1 nm and leakage current of ⩽1.0mA∕cm2. Transmission electron microscopy analysis showed that the Si layer was oxidized up to 1.4 nm during ex situ processing while the interface between the GaAs and a-Si remained atomically sharp without any sign of interfacial reaction.

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Citations
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Journal ArticleDOI

Towards Oxide Electronics: a Roadmap

Mariona Coll, +57 more
TL;DR: The Towards Oxide-Based Electronics (TO-BE) Action as mentioned in this paper has been recently running in Europe and has involved as participants several hundred scientists from 29 EU countries in a wide four-year project.
Journal ArticleDOI

Interface engineering and chemistry of Hf-based high-k dielectrics on III–V substrates

TL;DR: In this article, the authors provide an overview of interface engineering and chemistry of Hf-based high-k dielectrics on III-V substrates, and explore the possible influences of these hafnium-based gate dielectric on the current and future applications for nano-MOSFET devices.
Journal ArticleDOI

Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials

Marc Heyns, +1 more
- 01 Jul 2009 - 
TL;DR: In this paper, the International Technology Roadmap for Semiconductors (ITRS) indicates the requirements and technological challenges in the microelectronics industry in various technology nodes, and the major successes and remaining critical issues in the materials research on high-mobility channel materials for advanced CMOS devices are given in this issue of MRS Bulletin.
Journal ArticleDOI

Main determinants for III–V metal-oxide-semiconductor field-effect transistors (invited)

TL;DR: In this article, a model based on the charge neutrality level is proposed to explain all experimental work he performed on III-V MOSFETs using ex situ atomic-layer-deposited high-k dielectrics.
Journal ArticleDOI

Capacitance-voltage studies on enhancement-mode InGaAs metal-oxide-semiconductor field-effect transistor using atomic-layer-deposited Al2O3 gate dielectric

TL;DR: In this article, an enhancement-mode n-channel InGaAs metaloxide-semiconductor field effect transistor is also demonstrated by forming true inversion channel at Al2O3∕InGaAs interface.
References
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Journal ArticleDOI

Benchmarking nanotechnology for high-performance and low-power logic transistor applications

TL;DR: The results of this benchmarking exercise indicate that while these novel nanoelectronic devices show promise and opportunities for future logic applications, there still remain shortcomings in the device characteristics and electrostatics that need to be overcome.
Journal ArticleDOI

High-/spl kappa//metal-gate stack and its MOSFET characteristics

TL;DR: In this paper, the authors show that surface phonon scattering in the high/spl kappa/ dielectric is the primary cause of channel electron mobility degradation, and demonstrate that metal-gate electrodes, such as the ones with n+ and p+ work functions, are effective in improving channel mobilities to close to those of the conventional SiO/sub 2/poly-Si stack.
Journal ArticleDOI

GaAs metal–oxide–semiconductor field-effect transistor with nanometer-thin dielectric grown by atomic layer deposition

TL;DR: In this paper, a GaAs MOSFET with thin Al2O3 gate dielectric in nanometer (nm) range grown by atomic layer deposition is demonstrated, which shows a good linearity, low gate leakage current, and negligible hysteresis in drain current in a wide range of bias voltage.
Journal ArticleDOI

Quasistatic and high frequency capacitance–voltage characterization of Ga2O3–GaAs structures fabricated by in situ molecular beam epitaxy

TL;DR: In this paper, the interface properties of Ga2O3-GaAs structures fabricated using in situ multiple-chamber molecular beam epitaxy have been investigated, where oxide films were deposited on clean, atomically ordered (100) GaAs surfaces at ≂600°C by electron-beam evaporation using a Gd3Ga5O12 single-crystal source.
Journal ArticleDOI

Effects of passivating ionic films on the photoluminescence properties of GaAs

TL;DR: In this paper, the passivating effects of spincoated films of Na2S⋅9H2O on GaAs surfaces have been studied using roomtemperature photoluminescence (PL) and low-temperature PL spectroscopy.
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