Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Journal ArticleDOI
A ReRAM Physically Unclonable Function (ReRAM PUF)-Based Approach to Enhance Authentication Security in Software Defined Wireless Networks
TL;DR: A novel security protocol based on physical unclonable functions (PUFs) known as hardware security primitives to enhance the authentication security in SDWNs is proposed and the effectiveness of the proposed multi-state machine learning technique to predict the drifts of the PUFs’ responses in different temperature and biased conditions is presented.
Posted Content
On Foundation and Construction of Physical Unclonable Functions.
Jiang Wu,Maire O'Neill +1 more
TL;DR: A helper data algorithm (HDA) is proposed that is secure against active attacks and significantly reduces PUF implementation overhead compared to previous HDAs and integrates PUF construction into block cipher design to implement an efficient physical unclonable pseudorandom permutation (PUPRP); to the best of the knowledge, this is the first practical PUPRP using an integrated approach.
Book ChapterDOI
Breaking the Lightweight Secure PUF: Understanding the Relation of Input Transformations and Machine Learning Resistance
Nils Wisiol,Georg T. Becker,Marian Margraf,Tudor A. A. Soroceanu,Johannes Tobisch,Benjamin Zengin +5 more
TL;DR: In this paper, the authors take a closer look at one aspect of machine learning attacks that has not yet gained the needed attention: the generation of the sub-challenges in XOR Arbiter PUFs fed to the individual Arbiters.
Proceedings ArticleDOI
SCAPACH: Scalable Password-Changing Protocol for Smart Grid Device Authentication
TL;DR: A SCalable and Automated PAssword- CHanging protocol, SCAPACH, for unique authentication of human personnel (operator) and secure collection of telemetric data from a large number of pole devices is presented.
Proceedings ArticleDOI
On the Encryption of the Challenge in Physically Unclonable Functions
TL;DR: This paper proposes a solution where the challenges of a Strong PUF are encrypted in order to remove the linear challenge-response correlation that can be exploited by attacks, and presents two implementations of the proposed solution.
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.