Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Proceedings Article
Analog circuits for physical cryptography
Qingqing Chen,György Csaba,Xueming Ju,S. B. Natarajan,Paolo Lugli,Martin Stutzmann,Ulf Schlichtmann,Ulrich Rührmair +7 more
TL;DR: In this paper, the authors introduce two specially designed circuits, skew memories and massively parallel analog processor arrays (CNNs), which can be used to remotely and securely identify their owner and serve as a basis for various cryptographic protocols.
Proceedings ArticleDOI
PEAR: a hardware based protocol authentication system
TL;DR: In this article, the Physically Enhanced Authentication Ring (PEAR) is proposed to provide better security than traditional passwords, yet users must only enter a simple PIN, which is very usable and imposes little burden on end users and service providers.
Book ChapterDOI
Let Me Prove It to You: RO PUFs Are Provably Learnable
TL;DR: A Probably Approximately Correct (PAC) learning framework enabling the learning of an RO-PUF for arbitrary levels of accuracy and confidence is presented and it is proved that a polynomial-size Decision List (DL) can represent an PUF, thus, an arbitrarily chosen RO- PUF can be PAC learned by collecting only aPolynomial number of CRPs.
Proceedings ArticleDOI
Enforcing physically restricted access control for remote data
Michael S. Kirkpatrick,Sam Kerr +1 more
TL;DR: This work defines physically restricted access control to reflect the practice of binding access to devices based on their intrinsic properties, and formally analyze protocols enforcing this policy, and presents experimental results observed from developing a prototype implementation.
Journal ArticleDOI
A Novel Chip-Level Blockchain Security Solution for the Internet of Things Networks
Hiroshi Watanabe,Howie Fan +1 more
TL;DR: This article proposes a conceptual solution—Blockchained IoT—and shows that this concept is able to be realized on-chip level using mass-produced dynamical random access memory (DRAM) and coarsely evaluated the probability of two DRAM IC chips being associated with an identical cyber-physical chip identification accidentally.
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.