Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Journal ArticleDOI
Unified Analog PUF and TRNG Based on Current-Steering DAC and VCO
Mohammadhadi Danesh,Aishwarya Bahudhanam Venkatasubramaniyan,Gaurav Kapoor,Naveen Ramesh,Sudarsan Sadasivuni,Sanjeev Tannirkulam Chandrasekaran,Arindam Sanyal +6 more
TL;DR: This work presents a unified weak physical unclonable function (PUF) and a true random number generator (TRNG) based on the current-steering digital-to-analog converter (DAC) and ring voltage-controlled oscillator (VCO).
Proceedings ArticleDOI
Physically unclonable functions for embeded security based on lithographic variation
Aswin Sreedhar,Sandip Kundu +1 more
TL;DR: Novel PUF circuits designed to exploit inherent fluctuations in physical layout due to photolithography process to implement lithography-based physically unclonable functions (litho-PUFs).
Book ChapterDOI
Side-Channel Assisted Modeling Attacks on Feed-Forward Arbiter PUFs Using Silicon Data
Raghavan Kumar,Wayne Burleson +1 more
TL;DR: This work takes a closer look at the vulnerability of feed-forward arbiter PUFs towards a combined side-channel and modeling attack using data measured from the authors' 32nm test chips.
Proceedings ArticleDOI
Crossover Ring Oscillator PUF
TL;DR: The basic idea is to implement one-to-one input-output mapping with Lookup Table (LUT)-based interstage crossing structure in each level of inverters to improve flexibility and reliability and reduce hardware overheads.
Journal ArticleDOI
E2LEMI:Energy-Efficient Logic Encryption Using Multiplexer Insertion
TL;DR: This paper proposes to insert the multiplexer (MUX) with two cases: (i) the authors randomly insert MUXs equal to half of the output bit number (half MUX insertions); and (ii) they insertMUXsequal to the number of output bits (full MUXinsertions).
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.