Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Entropy analysis of physical unclonable functions
R Robbert Berg,van den +1 more
TL;DR: A novel method is presented which estimates the extractable entropy by calculating the mutual information between enrollment and reconstruction measurements, and a method to determine uniqueness from the field of biometrics is modified in such a way that the entropy of PUFs can be estimated.
Journal ArticleDOI
Theory and Application of Delay Constraints in Arbiter PUF
TL;DR: An algorithm to enumerate certain sets of delay constraints for the widely studied Arbiter PUF (APUF) circuit is presented, then it is demonstrated how these delay constraints can be utilized to expand the set of known Challenge--Response Pairs (CRPs), thus facilitating model-building attacks.
Book ChapterDOI
Evaluation of a PUF device authentication scheme on a discrete 0.13um SRAM
TL;DR: In this paper, a real SRAM Physically Unclonable Function (PUF) was evaluated on a discrete 0.13um SRAM, and the PUF result showed that this scheme indeed works well.
Journal ArticleDOI
Duty-Cycle-Based Controlled Physical Unclonable Function
TL;DR: A variable duty-cycle-based ring oscillator circuit is proposed as a controlled and reconfigurable PUF primitive using duty cycle comparisons instead of the conventional frequency comparisons to generate the output bit response.
Proceedings ArticleDOI
Sensor Based PUF IoT Authentication Model for a Smart Home with Private Blockchain
TL;DR: This paper delineates combination of BlockChain and Sensor based PUF authentication mechanism for solving real-time but non-repudiable access to IoT devices in a Smart Home by utilizing a mining less consensus mechanism for the provision of immutable assurance to users' and IoT devices' transactions i.e. commands, status alerts, actions etc.
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.